IEEE Transactions on Computers

Issue 3 • March 2006

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Displaying Results 1 - 14 of 14
  • [Front cover]

    Publication Year: 2006, Page(s): c1
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  • [Inside front cover]

    Publication Year: 2006, Page(s): c2
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  • Editor's Note

    Publication Year: 2006, Page(s):241 - 242
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  • Reconfiguration algorithms for power efficient VLSI subarrays with four-port switches

    Publication Year: 2006, Page(s):243 - 253
    Cited by:  Papers (27)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2240 KB) | HTML iconHTML

    Techniques to determine subarrays when processing elements of VLSI arrays become faulty have been investigated extensively. These tend to identify the largest subarray that is possible without concentrating on the power efficiency of the resulting subarray. In this paper, we propose new techniques, based on heuristic strategy and dynamic programming, to minimize the interconnect length in an attem... View full abstract»

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  • Double-residue modular range reduction for floating-point hardware implementations

    Publication Year: 2006, Page(s):254 - 267
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3512 KB) | HTML iconHTML

    In this paper, we present a novel algorithm and the corresponding architecture for performing range reduction, which is a preprocessing task required for the evaluation of some elementary functions such as trigonometric and exponential-based functions. The proposed algorithm introduces a modification to the modular range reduction algorithm which increases the speed of computation and allows us to... View full abstract»

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  • Simulation of computer architectures: simulators, benchmarks, methodologies, and recommendations

    Publication Year: 2006, Page(s):268 - 280
    Cited by:  Papers (35)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (296 KB) | HTML iconHTML

    Simulators have become an integral part of the computer architecture research and design process. Since they have the advantages of cost, time, and flexibility, architects use them to guide design space exploration and to quantify the efficacy of an enhancement. However, long simulation times and poor accuracy limit their effectiveness. To reduce the simulation time, architects have proposed sever... View full abstract»

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  • Control speculation for energy-efficient next-generation superscalar processors

    Publication Year: 2006, Page(s):281 - 291
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3552 KB) | HTML iconHTML

    Conventional front-end designs attempt to maximize the number of "in-flight" instructions in the pipeline. However, branch mispredictions cause the processor to fetch useless instructions that are eventually squashed, increasing front-end energy and issue queue utilization and, thus, wasting around 30 percent of the power dissipated by a processor. Furthermore, processor design trends lead to incr... View full abstract»

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  • Metastability in asynchronous wait-free protocols

    Publication Year: 2006, Page(s):292 - 303
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1520 KB) | HTML iconHTML

    We demonstrate that the safe register abstraction is an inappropriate model of a shared bit variable in an ACM. This is due to the phenomenon of metastability and the way that circuits are engineered to reduce the probability of it propagating. We give a bit model that takes the engineered restrictions into account and which is therefore stronger than the safe bit model. With our bit model we show... View full abstract»

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  • Specification and management of QoS in real-time databases supporting imprecise computations

    Publication Year: 2006, Page(s):304 - 319
    Cited by:  Papers (53)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1616 KB) | HTML iconHTML

    Real-time applications such as e-commerce, flight control, chemical and nuclear control, and telecommunication are becoming increasingly sophisticated in their data needs, resulting in greater demands for real-time data services that are provided by real-time databases. Since the workload of real-time databases cannot be precisely predicted, they can become overloaded and thereby cause temporal vi... View full abstract»

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  • Firm real-time system scheduling based on a novel QoS constraint

    Publication Year: 2006, Page(s):320 - 333
    Cited by:  Papers (23)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2664 KB) | HTML iconHTML

    Many real-time systems have firm real-time requirements which allow occasional deadline violations but discard any jobs that are not finished by their deadlines. To measure the performance of such a system, a quality of service (QoS) metric is needed. Examples of often used QoS metrics for firm real-time systems are average deadline miss rates and (m, k)-firm constraints. However, for certain appl... View full abstract»

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  • Extended multipoint relays to determine connected dominating sets in MANETs

    Publication Year: 2006, Page(s):334 - 347
    Cited by:  Papers (35)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2592 KB) | HTML iconHTML

    Multipoint relays (MPR) provide a localized and optimized way of broadcasting messages in a mobile ad hoc network (MANET). Using partial 2-hop information, each node chooses a small set of forward neighbors to relay messages and this set covers the node's 2-hop neighbor set. These selected forward nodes form a connected dominating set (CDS) to ensure full coverage. Adjih et al. later proposed a no... View full abstract»

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  • Diversity analysis in the presence of delay faults affecting duplex systems

    Publication Year: 2006, Page(s):348 - 352
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (472 KB) | HTML iconHTML

    This paper analyzes the problem of timing related common mode failures in redundant systems. The specific case of duplex systems in the presence of delay faults is analyzed by providing a probabilistic characterization of undetectable errors. PDF simulation was used to evaluate the probability of undetectable errors in conventional duplex systems and in duplex systems making use of a simple kind o... View full abstract»

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  • TC Information for authors

    Publication Year: 2006, Page(s): c3
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  • [Back cover]

    Publication Year: 2006, Page(s): c4
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org