By Topic

IEE Proceedings - Computers and Digital Techniques

Issue 1 • Date 10 Jan. 2006

Filter Results

Displaying Results 1 - 7 of 7
  • Memory test experiment: industrial results and data

    Publication Year: 2006, Page(s):1 - 8
    Cited by:  Papers (13)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (130 KB)

    The results of 12 well-known and three fault-primitive-based memory test algorithms applied to 0.13 micron technology 512 kB single-port SRAMs are presented. Each test algorithm is used with up to 16 different stress combinations (SCs) (i.e. different address sequences, data backgrounds and voltages) resulting in 122 tests. The results show that SCs influence the fault coverage (FC) of the test al... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Theory and practice of automatic design constraint generation

    Publication Year: 2006, Page(s):9 - 19
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (233 KB)

    Design verification and test generation require the modelling of an environment for circuit under consideration. The task is complex, time consuming and error prone. In dynamic circuits, the presence of multiple clocks makes the problem even worse because of the multiplicity of clocking configurations under which the circuit can be instantiated. A technique is presented, which when provided with a... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Design and implementation of a Java processor

    Publication Year: 2006, Page(s):20 - 30
    Cited by:  Papers (8)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (175 KB)

    Java is widely applied in current embedded systems due to its object-oriented features and advantages such as security, robustness, and platform independence. A Java virtual machine is needed to execute Java programs. However, in most of the existing solutions to Java virtual machines, the overhead of executing object-oriented related instructions is significant and becomes the bottleneck of syste... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Linear complexity of modulo-m related prime sequences

    Publication Year: 2006, Page(s):31 - 38
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (149 KB)

    The linear complexity of m-phase related prime sequences is investigated for the case when m is composite. For each relatively prime factor pik of m, the linear complexity and the characteristic polynomial of the shortest linear feedback shift register that generates the pik-phase version of the sequence can be deduced and these results can then be combi... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Reducing the number of specified values per test vector by increasing the test set size

    Publication Year: 2006, Page(s):39 - 46
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (131 KB)

    Test sets consisting of incompletely specified test vectors for full-scan circuits have applications in input test data compression and power reduction. Earlier procedures for reducing the percentage of specified values in a given test set maintained the test set size. A procedure is described that starts from a given (compact) test set and reduces the percentage of specified values by replacing a... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Gigabyte per second streaming lossless data compression hardware based on a configurable variable-geometry CAM dictionary

    Publication Year: 2006, Page(s):47 - 58
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (285 KB)

    A high-throughput lossless data compression IP core built around a CAM-based dictionary whose number of available entries and data word width adjust to the characteristics of the incoming data stream is presented. These two features enhance model adaptation to the input data, improving compression efficiency, and enable greater throughputs as a multiplicity of bytes can be processed per cycle. A p... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Memory access scheduling and binding considering energy minimisation in multi-bank memory systems: integrated approach

    Publication Year: 2006, Page(s):59 - 68
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (696 KB)

    Memory-related activity is one of the major sources of energy consumption in embedded systems. Many types of memories used in embedded systems allow multiple operating modes (e.g. active, standby, nap, power-down) to facilitate energy saving. Furthermore, it has been known that the potential energy saving increases when the embedded systems use multiple memory banks in which their operating modes ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.