Issue 12 • Date Dec. 2005
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Displaying Results 1 - 25 of 54
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[Front cover]
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PDF (53 KB)
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IEEE Journal of Solid-State Circuits publication information
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PDF (36 KB)
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Table of contents
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PDF (54 KB)
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Introduction to the Special Issue on the 2005 IEEE International Solid-State Circuits Conference
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PDF (536 KB)
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Integrated stereo ΔΣ class D amplifier
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PDF (1224 KB)
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A 3-mW 74-dB SNR 2-MHz continuous-time delta-sigma ADC with a tracking ADC quantizer in 0.13-μm CMOS
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PDF (1240 KB)
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"Split ADC" architecture for deterministic digital background calibration of a 16-bit 1-MS/s ADC
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PDF (808 KB)
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A 50-MS/s (35 mW) to 1-kS/s (15 μW) power scaleable 10-bit pipelined ADC using rapid power-on opamps and minimal bias current variation
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PDF (936 KB)
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All-digital PLL and transmitter for mobile phones
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PDF (1432 KB)
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An 802.11g WLAN SoC
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PDF (1296 KB)
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A direct-conversion receiver for DVB-H
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PDF (1016 KB)
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A UWB CMOS transceiver
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PDF (992 KB)
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A 3.1- to 8.2-GHz zero-IF receiver and direct frequency synthesizer in 0.18-μm SiGe BiCMOS for mode-2 MB-OFDM UWB communication
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PDF (1104 KB)
Aims & Scope
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.
Meet Our Editors
Editor-in-Chief
Un-Ku Moon
Oregon State University, EECS


