IEEE Design & Test of Computers

Issue 4 • Dec. 1991

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Displaying Results 1 - 6 of 6
  • Design and test of an integrated cryptochip

    Publication Year: 1991, Page(s):6 - 17
    Cited by:  Papers (18)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1381 KB)

    A self-testing cryptographic coprocessing chip that provides high security for any data protected through its use is described. The design philosophy and chip architecture are examined. Detailed design and test methods and solutions are given, and it is explained why the chip's design interacts well in networks and with secure hard disks.<> View full abstract»

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  • A methodology for debugging ASIC prototypes in the field

    Publication Year: 1991, Page(s):18 - 23
    Cited by:  Papers (1)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (619 KB)

    A step-by-step methodology for debugging and solving wafer sort and final-test prototype failures in application-specific integrated circuits (ASICs) is provided. The uses of schmoo plots, datalogs, and fault analysis are described, and a checklist for investigating problems is given. Most of the work can take place at the remote site, using simulators, schematics, and standard information provide... View full abstract»

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  • A mathematical model for integrated diagnostics

    Publication Year: 1991, Page(s):25 - 38
    Cited by:  Papers (38)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1556 KB)

    The authors expand on the form of the information flow model they introduced previously, (see ibid., vol.8, no.3, p.16-30 (1991)). Compiling the model requires three algorithms for determining higher-order relationships. One of these, the algorithm for computing logical closure, helps to simplify the modeling task. The authors also introduce a hypothetical antitank missile launcher to illustrate c... View full abstract»

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  • Test engineering education is rational, feasible, and relevant

    Publication Year: 1991, Page(s):52 - 62
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1076 KB)

    The author discusses the lack of qualified test engineers and the inadequacy of coordinated test engineer education in institutes of higher learning. He offers a basic curriculum that any university can employ to correct the deficiency. Both undergraduate and graduate programs are outlined.<> View full abstract»

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  • Economic effects in design and test

    Publication Year: 1991, Page(s):64 - 77
    Cited by:  Papers (20)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1355 KB)

    The authors argue that because of misconceptions and myths about the cost of test, many devices and systems are inadequately tested. Focusing on application-specific integrated circuits (ASICs), the authors discuss the economics of test and show how economic analysis leads to test that pays back. The EVEREST test strategy planner, a design tool that aids in the selection of design-for-testability ... View full abstract»

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  • Electrical characterization of megabit DRAMs. 11. Internal testing

    Publication Year: 1991, Page(s):39 - 51
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1196 KB)

    For pt.I. see ibid., vol.8, no.3, p.36-43 (1991). Contactless tools for testing inside dynamic RAMs, including hot-spot detection, emission microscopy, scanning laser microscopy, and submicron electron beam testing, are described. Basic principles and experimental setups are described. The utility of the techniques is assessed View full abstract»

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This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

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Editor-in-Chief
Krishnendu Chakrabarty