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Electron Devices, IEEE Transactions on

Issue 9 • Date Sept. 1983

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Displaying Results 1 - 25 of 32
  • [Front cover and table of contents]

    Publication Year: 1983 , Page(s): c1
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    Freely Available from IEEE
  • Foreword

    Publication Year: 1983 , Page(s): 967
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  • Modeling of the silicon integrated-circuit design and manufacturing process

    Publication Year: 1983 , Page(s): 968 - 986
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    The evolution of process modeling is traced starting with bipolar technology in the 1960's through recent processing concerns for oxide-isolated MOS devices. The kinetics of diffusion and oxidation are used to illustrate both physical and numerical effects. The interaction of device effects with process modeling is discussed as well as the statistical implications of process variables. The nature of computer-aided design tools for process and device modeling are discussed. This includes tools that bridge gaps between technology and system design with potential application for manufacturing. View full abstract»

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  • A comprehensive two-dimensional VLSI process simulation program, BICEPS

    Publication Year: 1983 , Page(s): 986 - 992
    Cited by:  Papers (40)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (736 KB)  

    Bell Integrated Circuit Engineering Process Simulator (BICEPS) is a comprehensive VLSI process-simulation program developed at Bell Laboratories. BICEPS incorporates the most up-to-date physical models and efficient numerical algorithms to make it a highly robust and general-purpose program. BICEPS can calculate doping profiles resulting from ion implantation, predeposition, oxidation, and epitaxy in one or two spatial dimensions as well as etching and deposition of oxide, nitride, and photoresist. In this paper, the physics of IC process simulation will be reviewed with an emphasis on the various physical models implemented in BICEPS. Calculation of the impurity profiles in VLSI devices involves the solution of a coupled set of nonlinear time-dependent partial differential equations, with moving boundaries and in more than one spatial dimension. The numerical techniques in obtaining a solution to this problem, namely, spatial discretization, time discretization, and the treatment of moving boundaries are also described in this paper. The capabilities of BICEPS are illustrated by the results of simulation of the fabrication of a typical NMOS transistor. View full abstract»

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  • A general solution method for two-dimensional nonplanar oxidation

    Publication Year: 1983 , Page(s): 993 - 998
    Cited by:  Papers (22)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (680 KB)  

    Two-dimensional oxidation is a moving-boundary problem involving steady-state oxidant diffusion and incompressible viscous flow. To solve the kinetic equations for the two-dimensional oxidation model, this work introduces a general numerical method that combines pressure/ velocity iteration with a boundary-value technique. View full abstract»

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  • A multigrid method for solution of the diffusion equation in VLSI process modeling

    Publication Year: 1983 , Page(s): 999 - 1004
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (496 KB)  

    If an implicit time discretization method is used for the diffusion equation, a large equation system has to be solved. In this work, a ν-cycle multigrid method was employed for this purpose. It can be easily applied to any 9-point approximation for nonlinear second-order differential operators, requires no iteration parameters, and can compete with other fast solvers [7]. The storage needed is 6 times the number of grid points. View full abstract»

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  • FEDSS—Finite-element diffusion-simulation system

    Publication Year: 1983 , Page(s): 1004 - 1011
    Cited by:  Papers (11)
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    The FEDSS program simulates semiconductor processes in two dimensions. An accurate model of the diffusion of impurity atoms into a substrate is necessary to assess the effects of process changes on impurity profiles. The process steps to be modeled include ion implantation, oxidation/drive-in, chemical predeposition through the surface, and oxide deposition. The finite-element method transforms the diffusion equation for impurity atoms to a simulation model at a discrete number of points. Direct techniques are used to solve the resulting matrix equations. The impurity distributions resulting from sequences of the process steps are shown. View full abstract»

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  • Vectorized Monte Carlo calculation for the transport of ions in amorphous targets

    Publication Year: 1983 , Page(s): 1011 - 1017
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (656 KB)  

    This paper describes the vectorized implantation of a Monte Carlo technique to simulate the transport of energetic ions in amorphous targets. Utilizing the vector processing capabilities of a CRAY-1 computer, we have achieved speed-up factors between three to ten over equivalent scalar implementations. The method has been successfully applied to simulate typical ion-implant conditions in modern silicon device processing. View full abstract»

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  • Semiconductor device simulation

    Publication Year: 1983 , Page(s): 1018 - 1030
    Cited by:  Papers (28)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1328 KB)  

    The most effective way to design VLSI device structures is to use sophisticated, complex two-dimensional (2D) and three-dimensional (3D) models. This paper and its companion [1] discusses the numerical simulation of such device models. Here we describe the basic semiconductor equations including several choices of variables. Our examples illustrate results obtained from finite-difference and finite-element implementations. We stress the necessary 3D calculations for small-size MOSFET's. Numerical results on inter-electrode capacitive coupling are included. View full abstract»

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  • Numerical methods for semiconductor device simulation

    Publication Year: 1983 , Page(s): 1031 - 1041
    Cited by:  Papers (52)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1128 KB)  

    This paper describes the numerical techniques used to solve the coupled system of nonlinear partial differential equations which model semiconductor devices. These methods have been encoded into our device simulation package which has successfully simulated complex devices in two and three space dimensions. We focus our discussion on nonlinear operator iteration, discretization and scaling procedures, and the efficient solution of the resulting nonlinear and linear algebraic equations. Our companion paper [13] discusses physical aspects of the model equations and presents results from several actual device simulations. View full abstract»

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  • Numerical simulation of hot-electron phenomena

    Publication Year: 1983 , Page(s): 1042 - 1049
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (816 KB)  

    An accurate two-dimensional numerical model for MOS transistors incorporating avalanche processes is presented. The Laplace and Poisson equations for the electrostatic potential in the gate oxide and bulk and the current-continuity equations for the electron and hole densities are solved using finite-difference techniques. The current-continuity equations incorporate terms modeling avalanche generation, bulk and surface Shockley--Read--Hall thermal generation-recombination, and Auger recombination processes. The simulation is performed to a depth in the substrate sufficient to include the depletion region, and the remaining substrate is modeled as a parasitic resistance. The increase in the substrate potential caused by the substrate current flowing through the substrate resistance is also included. The hot-electron distribution function is modeled using Baraff's maximum anisotropy distribution function. The model is used to study hot-electron phenomena including negative-resistance avalanche breakdown in short-channel MOSFET's and electron injection into the gate oxide. The model accurately predicts the positive-resistance branch of the drain current-voltage characteristic and could, in principle, predict the negative-resistance branch and the sustain voltage. The gate injection current is computed by summing the flux of electrons scattered into the gate oxide by each mesh volume element. The number of electrons in each element whose component of momentum normal to the oxide is sufficient to surmount the oxide potential barrier is approximated using Baraff's distribution function, and scattering along the electron trajectories is modeled using an appropriate mean free path. The flux scattered into the oxide can be expressed as an iterated six-fold integral which is evaluated using the potential and electron current density distributions produced by the model. Nakagome et al. [1] recently observed two new types of gate injection phenomena: avalanche injection and secondary ionization induced injection. The former is caused by carriers heated in the drain avalanche plasma, and the latter is caused by electrons generated by secondary impact ionization in the depletion region. The model yields gate current curves qualitatively similar to the experimental resu- lts. View full abstract»

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  • Automatic problemsize reduction for on-state semiconductor problems

    Publication Year: 1983 , Page(s): 1050 - 1056
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (576 KB)  

    Two algorithms are presented for the analysis of a large class of on-state semiconductor problems. The algorithms only involve the strictly necessary equations in the discretized problem. Equations that are satisfied and solution values that are found are not unnecessarily present in the calculations. Some examples of their use are shown. View full abstract»

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  • Two-dimensional analysis of semiconductor devices using general-purpose interactive PDE software

    Publication Year: 1983 , Page(s): 1056 - 1070
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1576 KB)  

    Analyzing currents and fields in VLSI devices requires solving three coupled nonlinear elliptic partial differential equations in two dimensions. Historically, these equations have been solved using a special-purpose program and batch runs on a large fast computer. We use a general-purpose program and interactive runs on a large minicomputer. We discuss the physical formulation of the semiconductor equations and give three example solutions: a short-channel MOSFET near punchthrough, a DMOS power transistor in the ON state, and a beveled p-n junction. These examples demonstrate that solutions to a very general class of semiconductor-device problems can be obtained using these methods. View full abstract»

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  • Finite boxes—A generalization of the finite-difference method suitable for semiconductor device simulation

    Publication Year: 1983 , Page(s): 1070 - 1082
    Cited by:  Papers (30)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1184 KB)  

    A two-dimensional numerical device-simulation system is presented. A novel discretization scheme, called "finite boxes," allows an optimal grid-point allocation and can be applied to nonrectangular devices. The grid is generated automatically according to the specified device geometry. It is adapted automatically during the solution process by equidistributing a weight function which describes the local discretization error. A modified Newton method is used for solving the discretized nonlinear system. To achieve high flexibility the physical parameters can be defined by user-supplied models. This approach requires numerical calculation of parts of the coefficients of the Jacobian. Supplementary algorithms speed up convergence and inhibit the commonly known Newton overshoot. The advantages and computer resource savings of the new method are described by the simulation of a 100-V diode. We also present results for thyristor and GaAs MESFET simulations. View full abstract»

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  • A novel finite-element approach to device modeling

    Publication Year: 1983 , Page(s): 1083 - 1092
    Cited by:  Papers (4)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (848 KB)  

    A finite-element device-simulation program is presented. An adaptive grid-refinement procedure is used to minimize the number of nodes. Two different kinds of elements are generated (triangles and rectangles) thus enabling the use of an irregular mesh. Different shape functions have been developed for the three variables; they are linear/ bilinear for the electric potential and linear/bilinear in Bernoulli-like functions for the quasi-Fermi potentials. Numerical examples are presented. View full abstract»

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  • Numerical solution of the semiconductor transport equations with current boundary conditions

    Publication Year: 1983 , Page(s): 1092 - 1096
    Cited by:  Papers (10)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (432 KB)  

    The semiconductor transport equations are solved by a hybrid finite-element method with current specified as a boundary condition at device contacts. Single carrier or bipolar devices of arbitrary shape, operating under transient or steady-state conditions, can be simulated with current sources or simple circuit elements connected to device terminals. This paper describes the numerical technique and device applications. View full abstract»

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  • Optimization of the finite-element solution of the semiconductor-device Poisson equation

    Publication Year: 1983 , Page(s): 1097 - 1103
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    A mesh-optimization technique is applied to the numerical simulation of semiconductor devices. The technique consists of moving the mesh-nodes while keeping their number constant, and is based upon the maximization of a functional related to the RHS of Poisson's equation. The result is equivalent to the minimization of the seminorm of u - u_{t} , where u is the normalized electric potential and uTits discretization over mesh T . The nodal-coordinate variations \Delta \bar{x} induce variations \Delta \bar{u} onto the electric potential, yielding a system of algebraic equations where both unknown vectors \Delta \bar{x} , \Delta \bar{u} appear. A suitable technique avoids any matrix inversion and allows application of the gradient method for the maximization procedure. The method has been tested on a one-dimensional Poisson solver for bipolar transistors. View full abstract»

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  • Numerical simulation of hot-carrier transport in silicon bipolar transistors

    Publication Year: 1983 , Page(s): 1103 - 1110
    Cited by:  Papers (31)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (816 KB)  

    Conventional numerical simulations of bipolar transistors assume that the carrier transport processes in the device can be described by the semiconductor equations with electric-field dependent mobility and the Einstein relation between the mobility and diffusion coefficient. These assumptions are not generally valid for the large electric fields, current densities, and concentration gradients present in advanced bipolar transistors. In this work, we present a new numerical bipolar device simulation which provides a better description of the carrier transport processes in these devices. Specifically, the carrier mobilities and diffusion coefficients are treated as functions of the average carrier energy and the thermoelectric current resulting from spatial variations in the carrier energies is included. The required carrier energies are calculated using energy balance equations. The results of this simulation are compared with those calculated using a conventional bipolar-device simulation, and the differences are discussed. View full abstract»

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  • Monte Carlo surface scattering simulation in MOSFET structures

    Publication Year: 1983 , Page(s): 1110 - 1116
    Cited by:  Papers (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (680 KB)  

    The Monte Carlo method has been applied to MOSFET devices with the gate lengths less than 1 µm. The electric field in the channel was obtained by an analytical approach. Since the classical situation is approached in the submicrometer gate device, the partial diffusive model is employed for surface scattering process. Transient phenomena such as velocity overshoot have been predicted with drain biases causing a large field gradient in the channel. Comparison of the results of the Monte Carlo simulation with those obtained by an analytical approach based on static mobility shows that the carrier transit time in the channel is shorter (as much as two times) than that predicted by the analytical approach for a 0.3 µm gate device. View full abstract»

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  • Simulation of the novel high-frequency FET with an opposed gate-source structure

    Publication Year: 1983 , Page(s): 1116 - 1123
    Cited by:  Papers (3)
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    The opposed gate-source transistor (OGST) is a novel high-frequency field-effect device with a symmetry plane and a distributed interaction mode. The operation principles of the OGST have been analyzed using numerical two-dimensional time-dependent device-simulation techniques. The coupled particle balance, momentum balance, and Poisson equations subject to general boundary conditions are solved with finite-difference methods. Device characteristics are simulated using both quasi-static and "ballistic" high-field transport models. The unique symmetry property of the OGST leads to a new pinchoff and current collection mechanism at the source contact. A 60-GHz design has been analyzed in detail. The simulations predict the lower and upper limits of 290 and 709 mS/mm for the transconductance, and 72 and 214 GHz for the cutoff frequency, respectively, for the intrinsic OGST. View full abstract»

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  • Steady-state photocarrier collection in silicon imaging devices

    Publication Year: 1983 , Page(s): 1123 - 1134
    Cited by:  Papers (29)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1184 KB)  

    Solid-state imagers lose resolution when photocarriers generated in one imaging site diffuse to a nearby site where they are collected. These processes are modeled by solving the steady-state diffusion equation for minority carriers. A source term represents the absorption of photons and the generation of photocarriers, and a linear term represents the loss of photocarriers by recombination. This is equivalent to studying the Helmholtz equation with an inhomogeneous term. The problem is simplified when the light source has symmetry. A line source or a cylindrically symmetric source leads to a two-dimensional problem. The approach of Seib, Crowell, and Labuda allows a solution by quadrature if the further assumption of a smooth top boundary is made. We calculate the integrated normal flux over each imaging site to see how many carriers diffuse from under the illuminated site to another site. We compare our predicted line- and point-spread functions to those measured on imagers and find reasonable agreement. This allows us to extract minority-carrier diffusion lengths. Further calculations show how the diffusion of carriers depends on the photon wavelength and the pixel size. We generalize Seib's approach and apply it to a solid-state imager covered with color filters. This allows us to see the extent of color mixing due to carrier diffusion. We also discuss a finite-difference solution of the diffusion equation that employs the method of conjugate gradients. This approach is useful for problems where the top boundary is not smooth. View full abstract»

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  • An interactive two-dimensional model for designing VLSI CCD's

    Publication Year: 1983 , Page(s): 1135 - 1142
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (872 KB)  

    An interactive two-dimensional (2-D) program has been developed for CCD design. Device structures are designed using a graphics terminal, and the corresponding 2-D potentials are obtained by solving Poisson's equation. The potentials are then used to calculate the density of mobile charges, employing the 2-D charge-integration method developed in this work. The accuracy and the limit of this approximation are established by comparing this method with 2-D simulations based on simultaneous solutions of Poisson's and current-continuity equations. Using this model, we have calculated charge-transfer efficiencies as a function of CCD channel width for different strengths of fat zeros. The calculated results agree fairly well with device measurements. View full abstract»

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  • A finite-element program for modeling transient phenomena in GaAs MESFET's

    Publication Year: 1983 , Page(s): 1142 - 1150
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (912 KB)  

    A two-dimensional finite-element program has been developed for analyzing transient and steady-state characteristics of GaAs devices with arbitrary geometric boundary shapes. The program code consists of two separate programs, GRID and FET, which are discussed in some detail. GRID serves to generate a nonuniform mesh, while FET computes a self-consistent solution of Poisson's and the current continuity equations. A GaAs FET with a trapezoidal recessed gate structure has been studied to demonstrate the capabilities of the program to analyze odd shapes. Current-voltage characteristics were computed for the recessed gate and a planar device. The results from both FET structures are compared and analyzed. In particular the effect of the recessed gate on the field distribution in the device is discussed. Large signal transient behaviors of both devices were examined, and it was found that both device structures produce similar results in steady-state and transient conditions. View full abstract»

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  • Numerical analysis of heterostructure semiconductor devices

    Publication Year: 1983 , Page(s): 1151 - 1159
    Cited by:  Papers (67)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (936 KB)  

    A numerical method for analyzing heterostructure semiconductor devices is described. The macroscopic semiconductor equations for materials with position-dependent dielectric constant, bandgap, and densities-of-states are first cast into a form identical to that commonly used to model heavily doped semiconductors. Fermi-Dirac statistics are also included within this simple, Boltzmann-like formulation. Because of the similarity in formulation to that employed for heavily doped semiconductors, well-developed numerical techniques can be directly applied to heterostructure simulation. A simple one-dimensional, finite difference solution is presented. The accuracy of the numerical method is assessed by comparing numerical results with special-case, analytical solutions. Finally, we apply numerical simulation to two heterostructure devices: the heterostructure bipolar transistor (HBT) and the modulation doped field-effect transistor. The influence of a conduction band spike on the current-voltage characteristics of the HBT emitter-base junction is studied, and the variation with gate bias of the two-dimensional electron gas in a field-effect device is also investigated. View full abstract»

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  • Modeling total dose effects in narrow-channel devices

    Publication Year: 1983 , Page(s): 1159 - 1164
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (624 KB)  

    Exposure of MOSFET's to large doses of ionizing radiation causes bulk oxide charging and an increase in interface state density. The former shifts device operation thresholds. The latter degrades channel mobility gmand increases subthreshold leakage. The degree of damage introduced depends on oxide electric fields. Making gate dimensions smaller complicates modeling a number of ways. Some of these complications are addressed in this paper. Specifically, problems associated with narrowing the width of the device channel are investigated. It is shown that differential charging of the field and gate regions leads to an effective widening of the channel. For typical n-channel MOSFET's used in very-large-scale integrated circuits, this widening may amount to 0.3 µm after a 10-krad:SiO2dose of ionizing radiation. A model incorporating channel widening and radiation-induced mobility degradation is proposed. View full abstract»

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Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

 

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Meet Our Editors

Acting Editor-in-Chief

Dr. Paul K.-L. Yu

Dept. ECE
University of California San Diego