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Electron Devices, IEEE Transactions on

Issue 8 • Date Aug. 1982

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Displaying Results 1 - 25 of 35
  • [Front cover and table of contents]

    Page(s): c1
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    Freely Available from IEEE
  • Array representation of nonidentical electrical cells

    Page(s): 1145 - 1151
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    Electrical cells (electrochemical cells, fuel cells, solar cells) are of relatively low voltage and power levels. The cells are, therefore, connected in series and parallel combinations to form an array that produces the desired voltage and power. The cells are "nonidentical" in their parameter values and have a certain statistical distribution. The dispersion of the cell parameters affects the electrical behavior of the array in such a way that the power output of the array may differ from the power output of the individual cells operating separately at the same conditions. This difference depends on the cell type, cell parameter distribution, array configuration, and the load type. The paper introduces a general procedure for the determination of the array performance of nonidentical cells based on statistical considerations. An identical "equivalent cell" was introduced, simplifying the array calculations. The procedure has been applied to voltage and current sources, series and parallel arrays, and four types of loads: matched load, constant resistant load, constant voltage, and constant current loads. View full abstract»

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  • Investigation of polycrystalline silicon back surface field solar cells

    Page(s): 1151 - 1155
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    Solar cells fabricated from "bictystalline" silicon wafers with respective orientations of View full abstract»

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  • A physical mechanism of current-induced resistance decrease in heavily doped polysilicon resistors

    Page(s): 1156 - 1161
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    A physical model describing the basic mechanism of the current-induced resistance decrease in heavily doped polysilicon resistors' experimental aspects reported in the previous paper [1], is proposed. The resistance decrease is explained in terms of the local melting of boundary layers between crystal grains in the polysilicon caused by the current feeding and a segregation of impurity atoms in the subsequent solidification process. This model explains all the experimental results concerning the resistance decrease phenomena. The theoretical expression for the current dependence of resistance decrease derived from the model agrees well with the experimental characteristics. View full abstract»

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  • Photoresponses in In2O3transparent gate MOS capacitors

    Page(s): 1161 - 1167
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    In this paper electrical and photoelectronic properties of sputtered In2O3films including 5 wt % SnO2and transparent gate MOS capacitors employing this film were discussed. In order to improve the characteristics of the sputtered films and to recover the radiation damage generated during the sputtering process, high-temperature annealing of the film in nitrogen was important. In the present experiment, the best post-annealing temperature was about 850°C, and the minimum resistivity ρ and the interface-state density Nsswhich resulted from this annealing were 1.1 × 10-3Ω . cm and 6.5 × 1010cm-2. eV-1, respectively. The dark current was comparable to that of conventional Al-gate MOS capacitors. Moreover, it became clear that the recombination loss of photogenerated carriers due to the interface states caused the degradation of the spectral response in the short wavelength range, when the surface of the MOS substrate was maintained in the vicinity of mid-gap potential. However, the transparent gate MOS capacitors biased in weak or strong inversion could be usable as high-sensitivity, photosensors in the blue region of the spectrum, because the interface states could not act as effective recombination centers for these bias conditions. View full abstract»

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  • v-E dependence in small-sized MOS transistors

    Page(s): 1168 - 1171
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    It is demonstrated that the hyperbolic relation for the v-E dependence which is usually used in transistor modeling, does not hold in short-channel MOSFET's (L_{eff} < 5µm). A new v-E relation is proposed, which is a surface modification of the Scharfetter-Gummel formula and which takes into account the pronounced role of warm electrons. The analysis shows that the lateral electric field at the source determines the transport properties in the channel. A comparison of theoretical results with experimental data is given. View full abstract»

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  • Process and device design of a 1000-V MOS IC

    Page(s): 1171 - 1178
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    High-voltage MOS devices and logic N-MOS circuits have been integrated on the same chip by using a silicon-gate isoplanar process that is compatible with present N-MOS LSI technology. The electrical characteristics of high-voltage MOS devices are modeled and characterized in terms of channel length, drift-layer length, drift-layer ion dose, and extended source field-plate effect. The theoretical calculations of on-resistanee, saturation drain current, and pinchoff voltage agree well with the experimental results. Based on the experimental and theoretical results, the device structure and the process parameters are optimized to obtain maximum drain saturation current with a low on-resistance and a drain breakdown of 1000 V. The optimized high-voltage MOS device can perform with a saturation drain current as high as 84 mA with an on-resistance as low as 300 Ω within an area of 520 µm × 1320 µm while maintaining a drain breakdown of 1000 V. View full abstract»

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  • A high-density, high-performance EEPROM cell

    Page(s): 1178 - 1185
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    The theory, design, and performance data of a new high density, high performanee EEPROM cell is described. The memory cell is fabricated using standard n-channel double-polysilicon processing together with thin-oxide technology, and has an area of 24 × 24 µm2using 4-µm design rules. The cell is of the floating gate type, and employs avalanche injection of electrons and holes from a common injector. The use of thin oxide (≃ 100 Å) between the n+-p+injector region of the substrate and the floating gate of the memory transistor makes operation possible using voltages of less than 20 V. Write and erase times are 10 ms with an endurance to write-erase cycling of 105cycles. The power dissipation during writing and erasing is 10 mW. View full abstract»

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  • Analysis of minority-carrier transport in polysilicon devices

    Page(s): 1185 - 1197
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    Key assumptions are made, with justification, to simplify the three-dimensional, nonlinear boundary-value problem that defines minority-carrier transport, including recombination, in polysilicon devices. These assumptions enable the separation of the grain-boundary recombination analysis, which is based on quasi-equilibrium in the space-charge region, from the intragrain transport analysis, which is done by partitioning the grain into subregions in which the minority-carrier flow is predominantly one-dimensional. The analyses are coupled through the effective minority-carrier recombination velocity at the grain boundary, which generally is dependent on the minority-carrier density in the quasi-neutral grain. Limitations of the model implied by the quasi-equilibrium assumption are effectively removed by recognizing that when conditions obtain that negate quasi-equilibrium, the effective recombination velocity is fixed at the minority-carrier kinetic-limit velocity. The model development is facilitated by computer-aided numerical analysis of the grain-boundary recombination and is supported by qualitative discussion of the underlying physics. View full abstract»

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  • Nonlinear analysis of the solid-state gyrotron oscillator by the Monte Carlo method

    Page(s): 1197 - 1209
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    A nonlinear analysis of the solid-state gyrotron oscillator is described to calculate the efficiency (η) and output power (Pw) of the device. Electron trajectories are calculated numerically. The motion of the electrons inside the cavity consists alternately of drift along helical trajectories followed by scattering. A Monte Carlo method has been used to treat scattering. Scattering processes included in the calculation are polar optic phonon, acoustic phonon, impurity, and impact ionization. Nonparabolicity and wave vector dependence of the periodic part of block functions are also used since phase bunching of electrons occurs due to the variation of effective mass with energy in the conduction band. η and Pware calculated as functions of frequency, temperature, impurity concentration, applied magnetic field, and other physical parameters ot the electron beam and the cavity made from InSb. At 500-GHz frequency and 4 K, output power of about 100 µW (assuming that Q of the cavity is 10) can be obtained with an efficiency of 5 percent. View full abstract»

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  • Soliton—Voltage and phase characteristics of a microwave crossed-field amplifier

    Page(s): 1210 - 1218
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    The soliton approach to solving a nonlinear, partial differential equation which describes the operation of a crossed-field amplifier is extended to include all dc magnetic field values, all operating frequencies, and all three spatial dimensions. Theoretical predictions of voltage characteristics are shown to agree with the experimental data for a large variety of cases. Equations for phase shift are discussed in depth with experimental data presented to demonstrate a close correlation with theoretical predictions. View full abstract»

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  • Power consumption of multiplexed liquid-crystal displays

    Page(s): 1218 - 1222
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    Display power consumption is calculated as a function of the physical display parameters for a five-voltage, line-at-a-time drive scheme. It is found that at high multiplexing levels the power varies as the product of the number of columns and the square of the number of rows, assuming that the rows are strobed. Typical power for a small 128 character display multiplexed at 1/28 duty cycle is expected to be 140 µW. View full abstract»

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  • Current distributions at the lateral spreading of electron-hole plasma in a thyristor

    Page(s): 1222 - 1225
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    By using the potential probe method, the turn-on action of the three junctions of a thyristor associated with the plasma spreading was investigated as a function of the anode current density Ja. By increasing Ja, the width of the transient region between the ON and the OFF region was increased in the p-base layer but decreased in the n-base layer. The build up of the excess carriers in the p-base layer was due to the lateral field in the transient region, while in the n-base layer it was mainly due to the lateral diffusion from the ON region. View full abstract»

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  • Miniaturization of Si MOSFET's at 77 K

    Page(s): 1226 - 1228
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    Micrometer and submicrometer dimension Si MOSFET's have been studied at liquid nitrogen temperature. The emphasis of the study has been on the changes in the minimum channel length required for long-channel behavior Lmindue to cooling. It is found that there is a reduction in Lminwhich is quite considerable in MOSFET's with low-channel doping. We have shown that this effect is due to a shorter lateral depletion width, and therefore longer effective channel length at low temperatures. A drastic decrease in punchthrough current has also been observed. View full abstract»

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  • Simplified plasma-coupled bipolar linear imager utilizing an extended probe structure

    Page(s): 1228 - 1232
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    A simplified bipolar linear image sensor is described. The imager is comprised of a 1024-bit photosensing diode array incorporating bipolar switches and two 512-staged static shift scanners of a plasma-coupled device (PCD). Based on the analytical results of a simplified PCD circuit model, a two-phase scanner has been designed and a large operation margin attained experimentally. As a result of the present structural improvements, a low-noise scanner has been successfully achieved with a low operation voltage and small stray capacitance. Results show that this imager operates with a single power supply below 5 V, has a 41-dB S/N ratio without signal processing, a ± 10- percent signal fluctuation, and high production yield. View full abstract»

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  • Analysis of static characteristics of a bipolar-mode SIT (BSIT)

    Page(s): 1233 - 1244
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    The three-dimensional effect of the potential profile in the channel of a bipolar-mode SIT (BSIT) is analytically discussed by using a very simple model. The basic performance of a BSIT is fundamentally determined by the potential barrier height at the intrinsic gate at the turn-off state, so that the effect of various structure parameters on the barrier height is discussed in detail to introduce the design rule of a BSIT. The operational principle of a BSIT is studied by using the two-dimensional numerical analysis, concentrating on the effect of geometrical parameter and impurity concentration on the potential distribution, electron, and hole density in the channel, as well as terminal characteristics. View full abstract»

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  • Two-dimensional particle modeling of submicrometer gate GaAs FET's near pinchoff

    Page(s): 1244 - 1255
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    The characteristics of very short gate GaAs MESFET's have been studied using a particle model which takes into account the hot-electron transport phenomena, i.e., the velocity overshoot. A brief description of this model is given. A particular emphasis has been placed on the pinched ranges of operation, showing an exponential dependence of Igversus Vds, and on the transition between the pinched and the saturated ranges, in which the trapped domain controls the channel. Analytical derivations are included leading to some scaling-down considerations. View full abstract»

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  • Discharging process by multiple tunnelings in thin-oxide MNOS structures

    Page(s): 1255 - 1261
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    A theoretical calculation is carried out on a discharging process in thin-oxide MNOS (metal-nitride-oxide-semiconductor) structures by proposing multiple and composite tunnelings. In this analysis three tunneling processes are considered: 1) from the SiO2-Si3N4interface to the Si conduction band, 2) from the Si3N4layer to the Si conduction band (directly), and 3) from the Si3N4layer to the interface (and then to the Si conduction band). The trapped electron densities at the interface and in the Si3N4layer axe investigated analytically and numerically. It is found from the analysis that the process 3) is dominant in transferring the electrons in the Si3N4layer to the Si conduction band. Furthermore, a physical interpretation for the maximum tunneling distance obtained in the previous work is given in details. View full abstract»

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  • Modeling of MOS transistors with nonrectangular-gate geometries

    Page(s): 1261 - 1269
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    The dc electrical characteristics of MOS transistors with nonrectangular-gate geometries are investigated. Closed-form analytical expressions relating the terminal characteristics to the geometric parameters are presented for several gate geometries including the trapezoid, "V," "L," and annulus. Experimental results based upon a specially fabricated NMOS test bar containing these nonrectangular devices are presented. A comparison of the theoretical and experimental results is made which shows close agreement. View full abstract»

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  • Feed forward due to barrier modulation in charge-coupled devices

    Page(s): 1269 - 1276
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    A new type of signal degradation, namely feed forward, is shown to exist in charge-coupled devices. This arises because of barrier modulation due to signal charge and the presence of surface states. Feed forward results in a pulse coming out earlier than the main signal pulse. The magnitude of the feed forward pulse was found to be as high as 0.5 percent of the signal charge for a 24½ bit, CCD delay line. Computer calculations have been performed to quantify the effect for the structure. Results obtained with a special clock for different clocking parameters have been explained, based on the existing model of emission of charge from the surface states. View full abstract»

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  • Unidirectional transfer properties of the plasma-coupled shift register

    Page(s): 1276 - 1283
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    Features of bipolar-type shift register (SR), utilizing a plasma-coupled device (PCD) for transferring potential variation through the bulk are described. The coupling-resistance parameter was studied to estimate the shift-register operation. To analyze the coupling resistance, an equivalent PCD circuit model was deduced from the device structure. The model sufficiently accounts for the features of unidirectional propagation based on an essentially geometrical design. To attain preferentially unidirectional signal propagation, an anti-symmetrical element configuration and an extended probe structure were fabricated, and the unidirectional transfer effect was investigated theoretically as well as experimentally. The relation between the operation margin and the device parameter, cell pitch length, and substrate resistivity, are discussed utilizing the antisymmetrical concept. High packing density, low operation voltage, and fewer shift pulses were predicted to be possible from the analytical estimations and were confirmed by the experimental results. View full abstract»

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  • Some general recombination statistics for semiconductor surfaces

    Page(s): 1284 - 1286
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    Trapping recombination by the usual phonon emission processes and by Auger processes can be combined to yield generalized Shockley-Read-Hall statistics. This has been generalized further to include a spectrum of trapping states, as well as the effect of "extra carriers." These are carriers which do not come directly from, or go to, the main bands of the semiconductor considered. The result should be useful in devices, for example, in studies of surface recombination. View full abstract»

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  • Second breakdown of vertical power MOSFET's

    Page(s): 1287 - 1293
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    It is shown that a phenomenon of second breakdown similar to that in bipolar transistors can occur in vertical power MOSFET's. A model for the phenomenon of second breakdown involving the avalanche multiplication of the channel current, the parasitic bipolar transistor, and base resistance is proposed. After presenting the theory, this model is compared with experiments on four-terminal V-groove test devices in which the substrate can be accessed independently. Good agreement is achieved between calculated and measured boundaries of the safe operating area. The model should be applicable to DMOS devices as well. View full abstract»

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  • Very low dark current heterojunction CCD's

    Page(s): 1294 - 1301
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    A model has been formulated which accounts for the major sources of dark current (JD) associated with a single pixel of a heterojunction, Schottky gate charge-coupled device (CCD). This model predicts the temperature dependence of JDand shows that for properly fabricated gates, bulk generation in the channel is the primary source of dark current. To verify the model, the dark current of Al0.3Ga0.7As/ GaAs n-p+heterostructure CCD's was measured over the temperature range 23-55°C. At room temperature,J_{D} approx 83pA/cm2, typically, and some pixels have JDas low as 43 pA/cm2. These are the lowest dark currents reported to date for a CCD structure. The data at 55°C show that, typically, JDincreases to ∼ 1 nA/cm2. Furthermore, the data confirm the temperature dependence of JDpredicted by the model. View full abstract»

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  • A new VLSI memory cell using DMOS technology (DMOS cell)

    Page(s): 1301 - 1308
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    A high-density dynamic memory cell using DMOS technology (DMOS cell) is proposed. A DMOS cell consists of an n-channel DMOSFET as a read gate and a p-channel MOSFET as a write gate with extensive node sharing. Since n-DMOSFET threshold state is nondestructively detected, the readout signal voltage is almost invariant to scaling. The cell area, which is made small by using two polysilicon layers and self-aligned structure, is about 50 percent of the conventional one-transistor memory cell area. An analytic model for DMOS cell readout voltage is proposed. From this model, the optimum DMOS cell structure, which gives more than 0.7-V readout voltage with 2-µm channel length, is found for 5-V power supply operation. Experimental data support this model. A 7-µA readout current per 1-µm channel width is obtained for 400-Å gate oxide test cell. The complete memory operation is confirmed with a 2 × 2 test cell array. View full abstract»

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IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

 

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Editor-in-Chief
John D. Cressler
School of Electrical and Computer Engineering
Georgia Institute of Technology