IEEE Transactions on Electron Devices

Issue 3 • March 1980

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  • [Front cover and table of contents]

    Publication Year: 1980, Page(s): c1
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    Freely Available from IEEE
  • A novel MOS PROM using a highly resistive poly-Si resistor

    Publication Year: 1980, Page(s):517 - 520
    Cited by:  Papers (15)  |  Patents (29)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (464 KB)

    A novel MOS electrically programmable read-only memory (PROM) using a highly resistive polycrystalline silicon (poly-Si) resistor as a memory element is proposed. In a highly resistive poly-Si, a new memory effect of an irreversible resistivity transition, from an initial highly resistive value to a low resistive one, is observed. The dependencies of the transition voltage and current, which cause... View full abstract»

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  • Effects of contact resistance and dopant concentration in metal—Semiconductor thermoelectric coolers

    Publication Year: 1980, Page(s):521 - 525
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (488 KB)

    The maximum heat that can be pumped by a metal-semiconductor thermoelectric cooling stage depends strongly on the dopant concentration in the semiconductor and on contact resistance at the metal-semiconductor interface which is cooled. A comparison is made between theoretical models describing these effects and experimental data for GaAs, both taken from original measurements and compiled from the... View full abstract»

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  • How to quickly predict the overall TWT and the multistage depressed collector efficiency

    Publication Year: 1980, Page(s):526 - 529
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (416 KB)

    A set of simple expressions is presented which provides a quick but accurate prediction of overall TWT efficiency using only a pocket calculator. View full abstract»

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  • Time dependence of the charge equilibration (fill-and-spill) input technique for profiled peristaltic charge-transfer devices

    Publication Year: 1980, Page(s):530 - 536
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (712 KB)

    A simple closed-form mathematical model is derived for the time-limited spill mechanism in charge equilibration inputs on profiled peristaltic charge-transfer devices (CTD's). Two modes of operation, peak detection and signal sampling, are analyzed representing extremes in the time variation of the input signal relative to the CTD clock. The theoretical models indicate two linear regions of the in... View full abstract»

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  • Punching through device and its integration—Static induction transistor

    Publication Year: 1980, Page(s):536 - 545
    Cited by:  Papers (28)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1040 KB)

    Static induction transistor (SIT) having a short-channel structure is characterized by small gate capacitance, high transconductance, and nonsaturation current-voltage characteristic. The major mechanism of current transport in SIT is majority-carrier injection due to barrier height control at the intrinsic gate in the channel. When the channel is completely pinched off due to the gate-to-channel ... View full abstract»

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  • Numerical simulation and measurement of Gunn device dynamic microwave characteristics

    Publication Year: 1980, Page(s):546 - 552
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (824 KB)

    Important characteristics of Gunn devices such as output power, efficiency, and stability are determined by the large-signal dynamic admittance of these devices. Previous attempts to correlate theoretical and measured values in absolute terms for this parameter have met with limited success due to modeling approximations and numerical simulation problems. An improved, implicit numerical simulation... View full abstract»

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  • Optimum scaling of buried-channel CCD's

    Publication Year: 1980, Page(s):553 - 562
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1048 KB)

    The maximum charge packet size in a two-phase charge-coupled device (CCD) is limited by many constraints relating to the transfer efficiency requirement and control circuit limitations. The constraints are quantified and an optimization routine is developed for designing CCD's with maximum charge capacity per unit area under these constraints. The optimum charge capacity for scaled down CCD's is c... View full abstract»

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  • Heavy doping effects in p-n-p bipolar transistors

    Publication Year: 1980, Page(s):563 - 570
    Cited by:  Papers (58)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (960 KB)

    This paper presents the heavy doping effects on the injection current characteristics in p-n-p transistors with a heavily doped but thin base region. The results of the present study indicate that 1) at room temperature the hole current injected into heavily doped base is insensitive to the impurity compensation effect, 2) a linear relationship between the base sheet resistance and the collector-c... View full abstract»

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  • Static negative resistance in calculated MESFET drain characteristics

    Publication Year: 1980, Page(s):570 - 572
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (352 KB)

    Static negative-resistance regions in MESFET drain current-voltage characteristics are sometimes observed in results obtained by computer-modeling techniques. This paper shows that in some cases these negative-resistance regions may be numerically induced by an inappropriate choice of the spatial mesh size used in the calculation. A criterion for choosing a sufficiently small mesh size is given. View full abstract»

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  • LASOS—laser annealed silicon on sapphire

    Publication Year: 1980, Page(s):573 - 578
    Cited by:  Papers (13)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (912 KB)

    Laser annealing techniques were successfully incorporated into standard MOS/SOS processing to increase transistor channel mobility and processing yield. Silicon islands were photolithographically defined and chemically etched (by KOH) on standard SOS wafers. The islands were exposed to radiation from an excimer laser (λ = 2490 Å) having a pulse duration of 25 ns, a beam size in the range... View full abstract»

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  • Design and evaluation of ion-implanted CMOS structures

    Publication Year: 1980, Page(s):578 - 583
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (868 KB)

    An IC chip intended for the integrated signal readout of PbS-Si heterojunction detectors has been designed using a p-well/ n-substrate CMOS structure, The chip contains integrated and discrete n-MOSFET readout circuits as well as test structures. The chip fabrication used ion implantation for all doping steps, including the p well. The fabricated device profiles show good agreement with the result... View full abstract»

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  • Development of a 2.6-kV light-triggered thyristor for electric power systems

    Publication Year: 1980, Page(s):583 - 591
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (924 KB)

    The status of a present Electric Power Research Institute, Inc. (EPRI) funded research program on a directly light-triggered thyristor for high-voltage direct current (HVDC) application is reviewed. An existing 53-mm, 2600-V, 1000-A electrically fired device was suitably modified to be turned on with an incident photopulse of 30 nJ, the basic problem being the retension of a 2000-V/µsdV/... View full abstract»

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  • n-channel MOS transistors in mercury—cadmium—telluride

    Publication Year: 1980, Page(s):591 - 595
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (560 KB)

    n-channel MOS transistors operating at 77 K have been realized in Hg0.71Cd0.29Te with ion-implanted source and drain junctions. Enhancement-mode transistors were made with evaporated ZnS as a gate insulator, and depletion-mode transistors were made using a native oxide of mercury-cadmium-telluride. The devices exhibit surface mobility as high as 1.5 × 104cm View full abstract»

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  • One-dimensional analysis of reverse recovery and dv/dt triggering characteristics for a thyristor

    Publication Year: 1980, Page(s):596 - 602
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (804 KB)

    Reverse recovery anddv/dttriggering characteristics of a thyristor are analyzed using a one-dimensional numerical model, which consists of the solutions of the full set of semiconductor device equations, including the effect of the shorted emitter. The calculated waveforms of the anode voltage and current are in good agreement with the experimental ones. The reverse recovery characteris... View full abstract»

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  • Plasma processes involved in dry processing

    Publication Year: 1980, Page(s):602 - 604
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (360 KB)

    In this brief the production rate of CF3and F from CF4by resonant processes involving He metastables is shown not to correlate with the etch rate of Si3N4(SiO2). Additional spectroscopic results suggest a second-order process is responsible for the production of the most active etchant species. View full abstract»

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  • An equivalent circuit for charge-transfer devices

    Publication Year: 1980, Page(s):604 - 606
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (336 KB)

    A new equivalent circuit for charge-transfer devices (CTD) is proposed. Results of circuit simulations of a string of CTD's, using the transient analysis program ASTAP, are presented. These show, among other details, incomplete transfer caused by high pulse repetition rates and backward transfer caused by excessive input charge. View full abstract»

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  • Standardized terminology for oxide charges associated with thermally oxidized silicon

    Publication Year: 1980, Page(s):606 - 608
    Cited by:  Papers (118)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (384 KB)

    Standarized terminology for oxide charges associated with the thermally oxidized silicon system is presented. This terminology is recommended by a committee established by the Electronics Division of the Electrochemical Society and the IEEE Semiconductor Interface Specialists Conference. All engineers and scientists concerned with oxide charges in silicon semiconductor applications are urged to ad... View full abstract»

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  • Erratum

    Publication Year: 1980, Page(s): 608
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  • [Back cover]

    Publication Year: 1980, Page(s): c4
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    Freely Available from IEEE

Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

 

Full Aims & Scope

Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy

Phone +39 011 090 4064
email giovanni.ghione@polito.it