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IEEE Transactions on Electron Devices

Issue 12 • Dec. 1974

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Displaying Results 1 - 11 of 11
  • [Front cover and table of contents]

    Publication Year: 1974, Page(s): c1
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    Freely Available from IEEE
  • A useful modification of the technique for measuring capacitance as a function of voltage

    Publication Year: 1974, Page(s):753 - 757
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (608 KB)

    Measurements of small signal capacitance as a function of applied bias voltage are widely used for the determination of information about metal-insulator-semiconductor (MIS) capacitors. The information that can be derived from the measurements includes interface-state density and flat-band charge density at the insulator-semiconductor (IS) interface, semiconductor doping, and charge stability unde... View full abstract»

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  • A three-level metallization three-phase CCD

    Publication Year: 1974, Page(s):758 - 767
    Cited by:  Papers (23)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2704 KB)

    A new electrode structure for CCD's is described. This structure is three-phase with three levels of metal and considerably relaxes the demands on the photolithography. It is predicted and shown that this structure leads to devices with a high performance, a high packing density, and a high yield over very large areas. Devices with 256 and 64 elements, primarily intended for analog delay applicati... View full abstract»

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  • Electron irradiation effects in MOS systems

    Publication Year: 1974, Page(s):768 - 777
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1152 KB)

    Flat-band shift measurements were made on p-type MOS devices irradiated with electrons at various gate-bias voltages. A structured reproducible curve of flat-band shift versus gate bias was obtained which could not be readily accounted for with existing models. Experimental data were taken over a wide range of negative and positive gate-bias voltages (consistent with electrical breakdown limits) i... View full abstract»

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  • Threshold voltage controllability in double-diffused-MOS transistors

    Publication Year: 1974, Page(s):778 - 784
    Cited by:  Papers (29)  |  Patents (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (896 KB)

    The sensitivity of double-diffused metal-oxide-semiconductor (D-MOS) transistor threshold voltage to fabrication process variations has been studied. Computed impurity profiles are used to study the process dependencies. For the double diffused process, the channel predeposition is shown to be the most critical step in threshold voltage control for long channel devices. Experimental results confir... View full abstract»

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  • The semiconductor field-emission photocathode

    Publication Year: 1974, Page(s):785 - 798
    Cited by:  Papers (9)  |  Patents (17)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1688 KB)

    The recently developed large-area field-emission photocathode is described. It consists of a finely spaced array of point emitters fabricated by etching of p-type silicon or other semiconductor. Uniform emission over areas of 6-7 cm2have been obtained. For Si, the spectral response extends from 0.4 to 1.1 µm. Quantum yields of 25 percent at 0.86 µm have been measured, which is... View full abstract»

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  • Low-level currents in ion-implanted MOSFET

    Publication Year: 1974, Page(s):799 - 807
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (752 KB)

    Low-level currents in ion-implanted MOSFET are of special importance in the design of low-voltage MOSFET circuits. In this paper, low-level currents in MOSFET with single and double layer implanted impurities are discussed. A single boron layer in n-channel MOSFET causes positive threshold shift and less steep log nSF(surface electron density)-VG(gate voltage) curves compared... View full abstract»

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  • An alternate geometry for the resistive layer GaAs amplifier

    Publication Year: 1974, Page(s):807 - 808
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (272 KB)

    An alternate geometry for a resistive layer GaAs epi-layer amplifier is argued to have desirable dc electric-field profiles while retaining the coupling and gain control advantages of the thin-film amplification scheme, Epilayer requirements point to the possibility of adapting LED technology to grow the material for such a device. View full abstract»

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  • Effects of ionization rates on silicon IMPATT devices

    Publication Year: 1974, Page(s):808 - 809
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (280 KB)

    The effects of ionization rates of electrons and holes on the properties of silicon IMPATT devices are presented. Both p-type and n-type silicon diodes are considered. Small- and large-signal results are given for typical X-band devices. View full abstract»

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  • Properties of millimeter-wave IMPATT diodes

    Publication Year: 1974, Page(s):809 - 811
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (400 KB)

    A study of the effect of the doping profile on the properties of IMPATT devices has been carried out and the results of a small-signal analysis for different ram-wave Si IMPATT-diode structures are presented. Properties of single-drift abrupt-junction diodes of both Si complementary structures with different punch-through factors (PTF) are described and compared to those of symmetrical and asymmet... View full abstract»

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  • [Back cover]

    Publication Year: 1974, Page(s): c4
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    Freely Available from IEEE

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IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

 

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Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy

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