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IEE Proceedings G - Circuits, Devices and Systems

Issue 5 • Date Oct. 1991

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Displaying Results 1 - 15 of 15
  • New method for the elimination of two-dimensional limit cycles in first order structures

    Publication Year: 1991, Page(s):541 - 550
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (692 KB)

    A recently reported time-varying two-dimensional structure is examined and appears quite robust to limit cycles owing to product rounding in a fixed-point implementation. From this realisation a 'factored-coefficient' structure is proposed which eliminates both row and column limit cycles. For a particular case a rigorous analysis of the equivalent factored-coefficient realisation leads to a simpl... View full abstract»

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  • New folded cascode transconductor for bandpass ladder filters

    Publication Year: 1991, Page(s):551 - 556
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (414 KB)

    The problems of designing CMOS transconductors for high frequency bandpass ladder filters are discussed, and an original circuit for overcoming these problems is presented. This circuit features a new grounded-quad input stage, a very high output impedance and the facility of low impedance inputs to avoid the requirement for transconductance ratios in scaled filters. The application of the new tra... View full abstract»

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  • State plane approach to frequency response of resonant convertors

    Publication Year: 1991, Page(s):557 - 563
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (363 KB)

    The steady state response of a resonant convertor can be represented graphically by the state plane diagram. On using the perturbation method on the steady state trajectory, a discrete small signal model for the convertor can be derived from the input voltage, controlled switching frequency and state variable perturbations. The conventional series resonant convertor is used as an example to demons... View full abstract»

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  • Stabilised power MOS-bipolar modules

    Publication Year: 1991, Page(s):564 - 566
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (188 KB)

    A technique, previously used to restore the feature of nearly constant-current (high output slope resistance) of intensively self-heated power MOSFETs, has been extended to MOS-bipolar hybrid power devices of different possible circuits. One particular configuration has been shown to be outstandingly successful.<> View full abstract»

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  • Synthesis of feedforward neural analogue-digital convertors

    Publication Year: 1991, Page(s):567 - 574
    Cited by:  Papers (8)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (494 KB)

    Several neural-based analogue-digital convertors (ADCs) have been proposed in the technical literature since Hopfield's contribution. The paper focuses on feedforward neural schemes. A review of three synthesis techniques for deriving a feedforward neural ADC is presented. The relationship between the resulting architectures and their conventional counterpart is examined. Finally, a comparison is ... View full abstract»

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  • Two-dimensional simulation of thyristor transient states from conduction to forward blocking

    Publication Year: 1991, Page(s):575 - 581
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (421 KB)

    A two-dimensional thyristor structure including the shorted cathode emitter was investigated in transient as well as in steady-state conditions. The investigations focused on the transients from conduction to forward blocking state of an SCR. The results presented indicate that the introduction of emitter shorts into a thyristor structure makes all phenomena inside the structure at least two-dimen... View full abstract»

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  • VLSI implementation of smart imaging system using two-dimensional cellular automata

    Publication Year: 1991, Page(s):582 - 586
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (461 KB)

    The design and implementation of a smart imaging system (SIS) based on two-dimensional cellular automata is presented. The SIS performs simple first stage preprocessing of the image in parallel with the sensing operation. The layout of the SIS chip as well as the smart imaging system pixel processing cell (SISPPC) are also shown. The SIS is addressable, like a dynamic memory, and hence techniques ... View full abstract»

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  • Fabrication of PMOS transistors by dopant implantation into TiSi/sub 2/

    Publication Year: 1991, Page(s):587 - 589
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (225 KB)

    Implantation into TiSi/sub 2/ and low-temperature annealing have been used to form P/sup +//n junctions and fabricate PMOS transistors. Spreading resistance measurements have shown that shallow, low-resistance junctions can be formed by this method. Dopant penetration through the silicide occurs above a certain implant energy, while outdiffusion from the silicide is observed to be somewhat inhibit... View full abstract»

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  • Minimum dimensional state-space formulation of linear systems

    Publication Year: 1991, Page(s):590 - 594
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (360 KB)

    The state-space modelling of linear time-invariant RLC circuits with independent sources is reconsidered. The principal idea presented is two-fold. In the first part of the paper it is shown that, if the circuits considered have capacitor and current source-only cut sets and/or inductor and voltage source-only loops, a new set of state equations can be obtained which will have a lower dimension co... View full abstract»

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  • Quasilinear approach to nonlinear systems and the design of n-double scroll (n=1, 2, 3, 4, . . .)

    Publication Year: 1991, Page(s):595 - 603
    Cited by:  Papers (7)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (475 KB)

    The double scroll is a strange attractor showing unpredictable transitions from one scroll to another. In the paper, an attractor is constructed that consists of n scrolls (n may be chosen). This was made possible by the development of an alternative method for studying nonlinear differential equations, called a quasilinear approach. The method is very qualitative, but it gives a global insight in... View full abstract»

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  • Latch-up DC triggering and holding characteristics of n-well, twin-tub and epitaxial CMOS technologies

    Publication Year: 1991, Page(s):604 - 612
    Cited by:  Papers (2)  |  Patents (7)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (662 KB)

    The dependence of the latch-up susceptibility on layout parameters is studied on four stripe structures made using different CMOS processes: a standard n-well, a twin-tub and twin-tub epitaxial technology. The correlation between triggering currents, well and substrate resistances and parasitic transistor gains is studied by means of emitter current triggering measurements and two-dimensional simu... View full abstract»

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  • PACE: a regular array for implementing regularly and irregularly structured algorithms

    Publication Year: 1991, Page(s):613 - 619
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (550 KB)

    The programmable adaptive computing engine (PACE), a medium-grained cellular automaton-based architecture supporting regularly and irregularly structured functions within a regularly structured array, is introduced. The PACE philosophy is described in detail. Its flexibility is demonstrated through the embedment of three irregularly structured algorithms within the PACE environment. Some results o... View full abstract»

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  • Optical detector of electrical discharges

    Publication Year: 1991, Page(s):620 - 622
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (229 KB)

    An optical detector of electrical discharges that consists of a fluorescent fibre and an optoelectronic circuit is presented. This permits the execution of measurements and observations sheltered from electromagnetic disturbances. This device is economically viable, easy to realise and can be installed in screened high-voltage apparatus.<> View full abstract»

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  • Novel CMOS operational amplifier design technique for high-frequency switched-capacitor applications

    Publication Year: 1991, Page(s):623 - 626
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (341 KB)

    Presents a design technique that enhances the operational characteristics of CMOS operational amplifiers for high-frequency switched-capacitor applications. The design approach introduces a method of settling time reduction that uses predefined layout blocks that can be placed side by side to perform the desired topological scaling for minimum settling time against load capacitance. Further, the m... View full abstract»

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  • Accurate delay estimation model for lumped CMOS logic gates

    Publication Year: 1991, Page(s):627 - 628
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (72 KB)

    Recently a novel slope delay model for timing verification in digital CMOS circuits has been presented by H.G. Yang and D.M. Holburn (see ibid vol.137, p.405-12, 1990). Three different classifications were made, based on the risetime (slope) of the input waveforms, as follows: quick-no effect of input risetime on the output voltage; intermediate-small effect of input risetime on the output delays;... View full abstract»

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