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Proceedings of the IEEE

Issue 9 • Date Sept. 1969

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Displaying Results 1 - 25 of 65
  • [Front cover and table of contents]

    Publication Year: 1969, Page(s): c1
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    Freely Available from IEEE
  • Scanning the issue

    Publication Year: 1969, Page(s):1467 - 1468
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    Freely Available from IEEE
  • The influence of crystal orientation on silicon semiconductor processing

    Publication Year: 1969, Page(s):1469 - 1476
    Cited by:  Papers (9)  |  Patents (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3387 KB)

    Silicon crystallographic orientation effects on semiconductor processing from single crystal growth through completed devices or circuits have been studied. The preferred octahedral crystal habit of silicon provides for stable crystal growth on the {111} plane, but the other low-index planes, {110} and {100}, are becoming more commonly used, in spite of greater difficulty in growth and processing ... View full abstract»

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  • Polishing of silicon by the cupric ion process

    Publication Year: 1969, Page(s):1476 - 1480
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (818 KB)

    This paper describes a newly developed chem-mech polishing process for silicon wafers. This polishing process, without using any abrasives, can produce a silicon surface free of work damage. A solution composed of cupric nitrate, ammonium fluoride, and nitric acid is used on a conventional polishing wheel. The rate of stock removal is controlled primarily by the composition of the solution and the... View full abstract»

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  • Heat treatments of gold-doped silicon diodes

    Publication Year: 1969, Page(s):1481 - 1483
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (316 KB)

    Gold-doped p+-n silicon diodes were subjected to heat treatments in the 700°-850°C range, and changes in the diode recovery time as a function of heat-treat time were noted. The recovery time was observed to increase with heat-treat time in two stages. In the first stage, the recovery time trincreases typically by a factor of 30 in several hours of annealing. In the... View full abstract»

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  • The properties of nickel in silicon

    Publication Year: 1969, Page(s):1484 - 1489
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    This paper describes the properties of active nickel centers in silicon. In particular, the role of nickel in both increasing and reducing minority carrier lifetime in silicon integrated circuits is described, and an assessment made of its use in this application. View full abstract»

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  • Thin-film silicon: Preparation, properties, and device applications

    Publication Year: 1969, Page(s):1490 - 1498
    Cited by:  Papers (8)  |  Patents (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1252 KB)

    This paper will review the properties of thin silicon films deposited on sapphire (SOS) and magnesium aluminate spinel by the pyrolysis of silane in the temperature range 900-1200°C. Variations of carrier mobility, free-carrier concentration, minority carrier lifetime, crystalline perfection, and surface quality will be discussed as a function of substrate crystal and growth parameters. MOS t... View full abstract»

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  • Shallow phosphorus diffusion profiles in silicon

    Publication Year: 1969, Page(s):1499 - 1506
    Cited by:  Papers (10)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (711 KB)

    Concentration profiles have been determined for phosphorus diffusion into silicon. These have been fitted to the solution of Fick's diffusion equations using a model where a moving boundary separates two distinct phases. Thus, it is concluded that the silicon surface region is part of a different phase from the rest of the diffused layer. For the short diffusion times studied, the phase boundary r... View full abstract»

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  • The influence of reaction kinetics between BBr3and O2on the uniformity of base diffusion

    Publication Year: 1969, Page(s):1507 - 1512
    Cited by:  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (715 KB)

    The variables affecting the uniformity of sheet resistance in a two step base diffusion system (deposition and drive-in), using BBr3as a source, have been investigated. The uniformity after the drive-in is predominantly dependent on the process variables during the deposition process. Amongst such variables as the design of the deposition system, the total carrier gas velocity, the spac... View full abstract»

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  • Correction to "Arctic ice type identification by radar"

    Publication Year: 1969, Page(s): 1512
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  • Correlation of diffusion process variations with variations in electrical parameters of bipolar transistors

    Publication Year: 1969, Page(s):1513 - 1517
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (424 KB)

    In this paper we consider the problem of determining the effects of a nonuniformity in diffusion processes on the resultant electrical characteristics in semiconductor devices. A bipolar, planar silicon p-n-p transistor is considered as an example. A model is presented describing the current gain in terms of measurable diffusion parameters. These parameters are 1) the four-point probe reading of t... View full abstract»

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  • Material and process considerations for monolithic low-1/f-noise transistors

    Publication Year: 1969, Page(s):1518 - 1522
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (407 KB)

    Oxide passivation, substrate orientation, transistor geometry, current density, and hFEwere evaluated for their effect on the 1/f noise spectrum of monolithic transistors. For verification of previous findings correlating 1/f noise with surface-state density, C-V measurements were made at 260 Hz and 0.1 MHz. Transistors fabricated on View full abstract»

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  • Collector diffusion isolated integrated circuits

    Publication Year: 1969, Page(s):1523 - 1527
    Cited by:  Papers (15)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (954 KB)

    A new, simplified, bipolar integrated circuit structure is described. This structure eliminates the need for the conventional isolation diffusion. Isolation is accomplished with the collector diffusion. This results in fewer fabrication steps than are required in fabrication of the standard buried collector structure. In addition, the new structure has greater circuit packing density because of th... View full abstract»

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  • Complementary-MOS low-power low-voltage integrated binary counter

    Publication Year: 1969, Page(s):1528 - 1532
    Cited by:  Papers (13)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (813 KB)

    An integrated complementary MOS-transistor binary counter stage, particularly suited to low-power low-voltage applications, has been realized in monolithic form. The topology of the circuit allows one to group together all p-channel MOSTs and all n-channel MOSTs within two distinct surface areas. This feature results in an appreciable reduction of the surface necessary for a given circuit function... View full abstract»

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  • Dielectric isolated integrated circuit substrate processes

    Publication Year: 1969, Page(s):1532 - 1537
    Cited by:  Papers (10)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (591 KB)

    Dielectric isolation has proven effective in raising inter-device breakdown voltages, lowering parasitic capacitances, and increasing resistance to radiation damage. The fabrication of a dielectric-isolated substrate, prior to diffusions, requires adequate control of the thickness of the epitaxial layer, of crowning and warpage, and of a necessarily smooth, damage-free surface. The mere juxtaposit... View full abstract»

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  • High value implanted resistors for microcircuits

    Publication Year: 1969, Page(s):1538 - 1542
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1519 KB)

    Boron ion implantation has been used to fabricate high sheet resistance p-type junction resistors in silicon substrates. Thermally grown SiO2and conventional photolithography were employed to define the resistor geometries. Ion doses in the range 0.5 × 1013to 10 × 1013ions/cm2with energies ranging from 30 to 55 keV followed by anneal at 950... View full abstract»

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  • The silicon-silicon dioxide system

    Publication Year: 1969, Page(s):1543 - 1551
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (870 KB)

    Study of the silicon-silicon dioxide system as a junction between a nearly ideal semiconductor and insulator has aroused both scientific and technological interest. Surface phenomena associated with this system are influenced by contamination and imperfections in the oxide, impurity redistribution in the silicon near the oxide, and finally by additional electronic energy states at the oxide-silico... View full abstract»

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  • Silicon-oxide interface studies by a photoelectric technique

    Publication Year: 1969, Page(s):1552 - 1557
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (574 KB)

    The growth of oxide layers on silicon is frequently carried out during the fabrication of integrated circuits. This paper describes the results of the study of the oxide layer and the Si-SiO2interface in a MOS configuration, by a photoelectric technique. The interface barrier height and the built-in voltage VMSin the oxide layer of a MOS structure are measured. The effect of ... View full abstract»

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  • Phosphosilicate glass stabilization of FET devices

    Publication Year: 1969, Page(s):1558 - 1563
    Cited by:  Papers (9)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (554 KB)

    The threshold voltage of MOSFET devices can be effectively stabilized from changes due to field-assisted motion of Na+in the gate oxide by the addition of a phosphosilicate glass (PSG) layer. The effectiveness of the glass for this purpose is markedly enhanced by increasing the P2O5concentration of the PSG. However, polarization of the PSG layer can, in turn, cause... View full abstract»

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  • Thin film dielectric materials for microelectronics

    Publication Year: 1969, Page(s):1564 - 1570
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (771 KB)

    Important applications of dielectric films used in modern integrated circuit technology include dielectric insulation, surface passivation, diffusion masking, radiation resistance, and hermetic seal. These many functional applications pose stringent requirements on the various properties of the insulating films and the methods used for their preparation. To date silicon dioxide (SiO2) h... View full abstract»

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  • Aluminum metallization—Advantages and limitations for integrated circuit applications

    Publication Year: 1969, Page(s):1570 - 1580
    Cited by:  Papers (8)  |  Patents (24)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2513 KB)

    The advantages and limitations of aluminum metallization are reviewed and compared with other systems used for integrated circuits. Metallization system properties of particular importance are summarized, including initial physical and chemical properties of the system which define potential performance and reliability considerations. The special requirements for MOS arrays and for multilevel-meta... View full abstract»

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  • Metallization systems for silicon integrated circuits

    Publication Year: 1969, Page(s):1580 - 1586
    Cited by:  Papers (11)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (628 KB)

    An investigation into single and composite layered metallization systems is described with respect to their limitations, possible failure mechanisms, and problems encountered in fabrication. Systems investigated include metals such as chromium, titanium, tungsten, and molybdenum in conjunction with gold. Comparisons are made to conventional aluminum with respect to ohmic contact to silicon, metall... View full abstract»

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  • Electromigration failure modes in aluminum metallization for semiconductor devices

    Publication Year: 1969, Page(s):1587 - 1594
    Cited by:  Papers (184)  |  Patents (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2843 KB)

    Two wear-out type failure modes involving aluminum metallization for semiconductor devices are described. Both modes involve mass transport by momentum exchange between conducting electrons and metal ions. The first failure mode is the formation of an electrically open circuit due to the condensation of vacancies in the aluminum to form voids. The second is the formation of etch pits into silicon ... View full abstract»

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  • Void formation failure mechanisms in integrated circuits

    Publication Year: 1969, Page(s):1594 - 1598
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (619 KB)

    The several interfacial regions where voids and electrical opens occur in semiconductor discrete devices and monolithic integrated circuits are described. The metals used at these interfaces in circuits today are listed and a description is given of the void-producing mechanisms applicable to each area, along with techniques for their detection. Voids which develop in the bond of gold wire, which ... View full abstract»

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  • A multichip package utilizing in-Cu flip-chip bonding

    Publication Year: 1969, Page(s):1599 - 1605
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3310 KB)

    A multichip package is described which is composed of an alumina ceramic base, screen-printed gold and glass crossovers, photolithographically delineated copper conductors, a brazed on Kovar lead frame, indium-copper flip-chip bonded integrated circuit chips, and a glass-severa, interfaces between dissimilar metals, between metals and insulators, and between different insulators. The reasons for s... View full abstract»

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H. Joel Trussell
North Carolina State University