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Signal Processing Magazine, IEEE

Issue 3 • Date May 2005

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Displaying Results 1 - 22 of 22
  • Mapping the MPEG-4 visual texture decoder: a system-level design technique based on heterogeneous platforms

    Publication Year: 2005 , Page(s): 65 - 74
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (779 KB) |  | HTML iconHTML  

    This article presents automated techniques supporting the design-time scheduling phase of a unique approach for managing concurrent tasks of dynamic real-time applications mapped on a heterogeneous platform with different types of software and hardware components. This approach is based on design-time exploration, which results in a set of schedules and assignments for each task, represented by Pareto curves. At run-time, a low complexity scheduler selects an optimal combination of working points, exploiting the dynamic and nondeterministic behavior of the system. The combined approach leads to significant overall power savings compared to state-of-the-art dynamic voltage scaling techniques. The design-time generated Pareto curves can also be used by the application designer to effectively make quantitative tradeoffs between system cost and performance. View full abstract»

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  • Design of a real-time gesture recognition system: high performance through algorithms and software

    Publication Year: 2005 , Page(s): 57 - 64
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (892 KB) |  | HTML iconHTML  

    The embedded systems group at Princeton University in New Jersey has developed, as an example of smart cameras, a gesture recognition system that can build a complete model of the torso and recognize gestures at 30 frames/s. Designing a real-time gesture recognition system is a complex task that involves many issues such as algorithm design, processing speed, system architecture, and video interface. In this article, the authors describe a method to manage the complexity by decomposing the entire process into different design and implementation phases. View full abstract»

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  • Hardware/software codesign for DSP (from the Guest Editor)

    Publication Year: 2005 , Page(s): 11 - 12
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (157 KB) |  | HTML iconHTML  

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  • On MIMO channel capacity: an intuitive discussion

    Publication Year: 2005 , Page(s): 83 - 84
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (211 KB) |  | HTML iconHTML  

    For a general MIMO communication channel, the use of the linear minimum mean-squared-error (LMMSE) estimator followed by the separate substream decoding is not a capacity-wise optimal scheme. In this paper, the author presents analytical computations of the MIMO channel capacity. The article relates the capacity to the covariance matrix of the LMMSE estimate that provides a clear interpretation of the concept of capacity as well some optimal transceiver design schemes that aim to achieve channel capacity. View full abstract»

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  • Energy-delay efficient data memory subsystems: suitable for embedded media "processing"

    Publication Year: 2005 , Page(s): 23 - 37
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (857 KB) |  | HTML iconHTML  

    This article presents a novel special-purpose data memory subsystem, called Xtream-Fit, suitable for embedded media processing, and demonstrates how it achieves high energy-delay efficiency across a wide range of media devices, including systems concurrently executing multiple applications under synchronization constraints. Experimental results show that Xtream-Fit delivers a substantial improvement in energy-delay product, as compared to general-purpose memory subsystems enhanced with state of-the-art cache decay and SDRAM dynamic power mode control policies. Xtreams-Fit's performance is predicted on a novel, task-based execution model that enhances opportunities for efficient stream granularity prefetching and aggressive software-based energy conservation techniques. View full abstract»

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  • Volunteers (from the Editor)

    Publication Year: 2005 , Page(s): 2
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  • Advertisers Index

    Publication Year: 2005 , Page(s): 88
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  • In Memoriam - Ben Gold, 1923-2005

    Publication Year: 2005 , Page(s): 75
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    Freely Available from IEEE
  • Compiling high-level languages to DSPs: automating the implementation path

    Publication Year: 2005 , Page(s): 47 - 56
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (728 KB) |  | HTML iconHTML  

    A large and growing number of digital signal processor (DSP) applications are initially prototyped in Matlab, a high-level language that provides concise, intuitive statement of mathematical computations. Work in this elegant language stops at the prototyping stage due to the absence of an effective automatic path to implementation. This articles overviews a set of techniques for automating an implementation path from Matlab to DSPs and provides preliminary results on the effectiveness of such techniques. View full abstract»

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  • Filtering tricks for FSK demodulation

    Publication Year: 2005 , Page(s): 80 - 82
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (371 KB) |  | HTML iconHTML  

    In this article, we present a useful trick to make the implementation of a digital noncoherent frequency shift keying (FSK) demodulator more economical from a hardware complexity standpoint, with the goal of minimizing its computational workload. The article also utilizes comb filters in removing the dc offset from the signals and in reducing the complexity of follow-on filtering. The corrected signal is amenable to additional processing at the IF frequency or may be down-converted to a baseband frequency for further processing. View full abstract»

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  • The accidental university president-life comes full circle

    Publication Year: 2005 , Page(s): 8 - 10
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (348 KB) |  | HTML iconHTML  

    First Page of the Article
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  • Hardware/software codesign: a systematic approach targeting data-intensive applications

    Publication Year: 2005 , Page(s): 14 - 22
    Cited by:  Papers (12)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (789 KB) |  | HTML iconHTML  

    This article presents a systematic approach to hardware/software codesign targeting data-intensive applications. It focuses on the application processes that can be represented in directed acrylic graphs (DAGs) and use a synchronous dataflow (SDF) model, the popular form of dataflow employed in DSP systems when running the process. The codesign system is based on the ultrasonic reconfigurable platform, a system designed jointly at Imperial College and the SONY Broadcast Laboratory. This system is modeled as a loosely coupled structure consisting of a single instruction processor and multiple reconfigurable hardware elements. The paper also introduces and demonstrates a task-based hardware/software codesign environment specialized for real-time video applications. Both the automated partitioning and scheduling environment and the task manager program help to provide a fast robust for supporting demanding applications in the codesign system. View full abstract»

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  • DSP chip options contract and expand

    Publication Year: 2005 , Page(s): 85
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (158 KB) |  | HTML iconHTML  

    First Page of the Article
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  • Performance analysis of multiprocessor DSPs: a stream-oriented component model

    Publication Year: 2005 , Page(s): 38 - 46
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (777 KB) |  | HTML iconHTML  

    This article introduces a composable component model that can be used for performance analysis of complex digital signal processing (DSP) systems consisting of several computation resources communicating via some shared media. It reviews different methods of analyzing the performance of such communication-centric systems, including simulation, trace-based simulation, and symbolic methods. Finally, a component model that can be used to formally state the relationship between the usage and the processing capabilities of different computation and communication resources is established. View full abstract»

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  • SPS society election results - Society News

    Publication Year: 2005 , Page(s): 6
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (186 KB) |  | HTML iconHTML  

    First Page of the Article
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  • Understanding speech: an interview with John Makhoul

    Publication Year: 2005 , Page(s): 76 - 79
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  • IEEE Signal Processing Magazine - Front cover

    Publication Year: 2005 , Page(s): 0_1
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    Freely Available from IEEE
  • Table of contents

    Publication Year: 2005 , Page(s): 1
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    Freely Available from IEEE
  • Sharpen your pencils (president's Message)

    Publication Year: 2005 , Page(s): 4
    Save to Project icon | Request Permissions | PDF file iconPDF (190 KB) |  | HTML iconHTML  
    Freely Available from IEEE
  • Announcement

    Publication Year: 2005 , Page(s): 7
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    Freely Available from IEEE
  • New products

    Publication Year: 2005 , Page(s): 86
    Save to Project icon | Request Permissions | PDF file iconPDF (293 KB) |  | HTML iconHTML  
    Freely Available from IEEE
  • Call for Papers - For a new journal IEEE Transactions on Information Forensics and Security

    Publication Year: 2005 , Page(s): 89
    Save to Project icon | Request Permissions | PDF file iconPDF (461 KB)  
    Freely Available from IEEE

Aims & Scope

IEEE Signal Processing Magazine publishes tutorial-style articles on signal processing research and applications, as well as columns and forums on issues of interest.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Min Wu
University of Maryland, College Park
United States 

http://www/ece.umd.edu/~minwu/