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Power Electronics Letters, IEEE

Issue 1 • Date March 2005

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Displaying Results 1 - 14 of 14
  • Table of contents

    Publication Year: 2005 , Page(s): c1
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  • IEEE Power Electronics Letters publication information

    Publication Year: 2005 , Page(s): c2
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  • PWM methods to handle time delay in digital control of a UPS inverter

    Publication Year: 2005 , Page(s): 1 - 6
    Cited by:  Papers (17)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (264 KB) |  | HTML iconHTML  

    With the popularity of micro-processors, digital controllers are widely used in uninterruptible power supply (UPS) inverters. These digital control systems of UPS inverters require a time interval for sampling and computation, which sometimes affects the performance of inverters. In this paper, the problem of time delay in digital control of a UPS inverter is discussed. Then two novel pulsewidth modulation (PWM) methods, the two-polarity PWM method and the asymmetric PWM method, are proposed to handle the time-delay problem. Both of these PWM methods can achieve a wide range of duty ratio between 0.05-0.95, which is independent of inverter model. Furthermore, they are easy to implement using a digital micro-controller. Experimental results are presented in the paper to verify feasibility of the proposed PWM methods. View full abstract»

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  • Modeling the sequential switching shunt series regulator

    Publication Year: 2005 , Page(s): 7 - 13
    Cited by:  Papers (8)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (336 KB) |  | HTML iconHTML  

    This letter characterizes, in terms of the bandwidth and limit cycle frequency of its constituent subsystems, the sequential switching shunt series regulator -S4R, a high-efficiency, low-mass and volume power cell devised to power the next generation of regulated power buses in telecommunication spacecrafts. Transconductance power source modeling is used to obtain linear and nonlinear models. These are used to establish a design control strategy which involves the dynamic response in large load requirements or at the end of the satellite life. Simulations and experimental results are also given to demonstrate the validity of the model. View full abstract»

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  • Improved voltage clamping scheme for ZVS PWM three-level converter

    Publication Year: 2005 , Page(s): 14 - 18
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (584 KB) |  | HTML iconHTML  

    This paper proposes an improved zero-voltage-switching pulsewidth-modulation (ZVS PWM) three-level converter, which is improved from the original ZVS PWM three-level converter by merely exchanging the position of the resonant inductance and the transformer, such that the transformer is connected with the lagging switches. The improved converter has several advantages over the original, e.g., the clamping diodes conduct only once in a switching period, and the resonant inductance current is smaller in zero state, leading to a higher efficiency and reduced duty-cycle loss. A blocking capacitor is usually introduced to the primary side to prevent the transformer from saturating. This paper analyzes the effects of the blocking capacitor in different positions, and a best scheme is determined. A 2.5-kW prototype converter verifies the effectiveness of the improved converter and the best scheme for the blocking capacitor. View full abstract»

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  • A nonlinearity compensation method for a matrix converter drive

    Publication Year: 2005 , Page(s): 19 - 23
    Cited by:  Papers (18)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (272 KB)  

    This paper presents a new method to compensate the nonlinearities for matrix converter drives. The nonlinearities of matrix converter drives such as commutation delay, turn-on and turn-off time of the switching devices, and on-state switching device voltage drop is corrected by a new matrix converter model using the direction of current. The proposed method does not need any additional hardware or complicated software and it is easy to realize by applying the algorithm to the conventional vector control. The proposed compensation method is applied for high-performance induction motor drives using a 3-kW matrix converter system without a speed sensor. Experimental results show the proposed method provides good compensating characteristics. View full abstract»

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  • A constant-frequency method for improving light-load efficiency in synchronous buck converters

    Publication Year: 2005 , Page(s): 24 - 29
    Cited by:  Papers (50)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (328 KB) |  | HTML iconHTML  

    The low-voltage synchronous rectifier buck topology suffers from low efficiency at light loads due to dissipation that does not scale with load current. In this paper we present a method for improving light-load efficiency in synchronous buck converters by reducing gate drive losses. We propose a new gate drive technique whereby the gate voltage swing dynamically scales with load current such that gate drive loss is traded for conduction loss. Since conduction losses scale with the square of load current, an optimal gate swing exists that, at light loads, is shown to be less than the supply voltage. Using this method we obtain a 6.25% increase in converter efficiency at a load current of 10 mA and operating at a constant switching frequency of 2 MHz. View full abstract»

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  • A three-phase symmetrical multistage Voltage multiplier

    Publication Year: 2005 , Page(s): 30 - 33
    Cited by:  Papers (17)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (288 KB)  

    A three-phase symmetrical Cockcroft-Walton (CW) multistage voltage multiplier (VM) is proposed. It consists of one smoothing column and six oscillating columns. The oscillating columns are connected to three-phase power through center-tap transformers. The capacitors of the smoothing column are charged six times per cycle by six oscillating columns and are discharged six times through the load, unlike the conventional symmetrical VM in which they are charged and discharged twice per cycle. The three-phase symmetrical structure completely eliminates the first five harmonic components of load-generated voltage ripple. Theoretical analysis indicates that the proposed three-phase symmetrical CW-VM has one-third the voltage ripple and voltage drop of the conventional single-phase symmetrical CW-VM. Experimental and simulation results of the proposed three-phase symmetrical CW-VM as well as of the conventional single-phase symmetrical CW-VM are presented. A comparison shows that the three-phase symmetrical CW-VM has significantly less voltage ripple, half the voltage drop, and a fourfold increase in output power over the conventional single-phase symmetrical CW-VM. View full abstract»

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  • A lamp power control scheme for dimmable electronic ballasts to minimize the temperature effect on the lamp brightness

    Publication Year: 2005 , Page(s): 34 - 39
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (248 KB)  

    A hybrid lamp power control scheme for dimmable electronic ballasts is proposed. Apart from adjusting the brightness of the lamp, the proposed method can also minimize the ambient temperature effect on light output. Instead of regulating the lamp current, the proposed method is based on regulating the power supplying the lamp. First, the dimming operation is achieved by regulating the dc voltage at the ballast inverter input. Second, variation of the lamp power (due to the temperature effect) is regulated by sensing the inverter average input current to adjust the switching frequency of the inverter. An 18 W prototype has been built and tested. The lamp power and luminous output of the prototype at the ambient temperature from 5°C to 35°C have been studied. View full abstract»

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  • Erratum to "Variable-frequency predictive digital current mode control"

    Publication Year: 2005 , Page(s): 40
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    In the above-named letter [ibid., vol. 2, pp. 113??16, Dec. 2004], the title of Section II was incorrectly edited. It should have read "Control in CCM." View full abstract»

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  • IEEE Power Electronics Letters Information for authors

    Publication Year: 2005 , Page(s): 41 - 42
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  • IEEE copyright form

    Publication Year: 2005 , Page(s): 43 - 44
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  • IEEE Power Electronics Society Information

    Publication Year: 2005 , Page(s): c3
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  • IEEE Power Electronics Letters blank page

    Publication Year: 2005 , Page(s): c4
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