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Consumer Electronics, IEEE Transactions on

Issue 1 • Date Feb. 2005

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Displaying Results 1 - 25 of 56
  • A cost effective color gamut mapping architecture for digital TV color reproduction enhancement

    Page(s): 168 - 174
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (922 KB) |  | HTML iconHTML  

    A cost effective three-dimensional color gamut mapping architecture is described. The conventional three-dimensional reduced resolution look-up table is considered and the concept of three-dimensional reduced resolution difference look-up table is introduced for cost effective and real-time color gamut mapping. The overall architecture uses one-dimensional memory decomposition of three-dimensional gamut mapping look-up table and three-dimensional interpolation and simple adding operation for generating the final gamut mapped colors. The required computational cost is greatly reduced by look-up table resolution adjustment and further reduced by the gamut mapping rule modification. The proposed architecture greatly reduces the required memory size and hardware complexity compared to the conventional methods and it is suitable for real-time applications. The proposed hardware architecture is suitable for FPGA and ASIC implementation and could be applied to the real-time display quality enhancement purposes. View full abstract»

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  • Effective designation of specific shots on video service system utilizing Mahalanobis distance

    Page(s): 152 - 159
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1264 KB) |  | HTML iconHTML  

    A new video service system characterized by specific shot designation using the Mahalanobis distance at high fitting rate was built based on segmented motion vector magnitudes on each block of video frames, and inter-block correlations for making a decision logically. The specific shots can be designated real time from the live video stream of baseball games utilizing the DSP applied to the Mahalanobis distance generation as well as that which was applied to the motion vector calculus. This video service system was applied to live video of baseball games. View full abstract»

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  • A highlight scene detection and video summarization system using audio feature for a personal video recorder

    Page(s): 112 - 116
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1088 KB) |  | HTML iconHTML  

    The personal video recorder such as recordable-DVD recorder, Blu-ray disc recorder and/or hard disc recorder has become popular for a large volume storage device for video/audio content data and a browsing function that would quickly provide a desired scene to the user is required as an essential part of such a large capacity recording/playback system. We propose a highlight scene detection function by using only 'audio' features and realize a browsing function for the recorder that enables completely automatic detection of sports highlights. We detect sports highlights by identifying portions with "commentator's excited speech" using Gaussian mixture models (GMM's) trained using the MDL criterion. Our computation is carried out directly on the MDCT coefficients from the AC-3 coefficients thus giving us a tremendous speed advantage. Our accuracy of detection of sports highlights is high across a variety of sports. View full abstract»

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  • Hybrid equalized partial response path-feedback maximum likelihood toward higher density Blu-ray disc

    Page(s): 94 - 102
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1007 KB) |  | HTML iconHTML  

    Recently, high density optical recording systems like BD (Blu-ray disc) have been standardized regarding a PRML (partial response maximum likelihood) signal processing technology, which has been thoroughly investigated on high density magnetic recording channels for many years. In order to gain a margin of optical disc drives, PFML (path-feedback maximum likelihood), which is also known as adaptive Viterbi, has been also developed in recent years. In this paper, we propose a new signal processing system, which equalizes the waveform causally, enhances the performance of the PFML detector and provides a stable PLL (phase locked loop) towards much higher density formats than standard BDs. View full abstract»

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  • Improvement of low gray-level linearity using perceived luminance of human visual system in PDP-TV

    Page(s): 204 - 209
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (775 KB) |  | HTML iconHTML  

    One of the factors deteriorating the image quality of PDP-TV is the low gray-level contour occurring mainly due to inverse gamma correction. From the viewpoint of human visual perception, the low gray-level contour becomes more serious because of the nonlinear output luminance of PDP at low gray-levels. In this paper, a modified inverse gamma correction method and a gray-level linearization technique considering human visual perception are proposed for enhancing image quality at low gray-levels. View full abstract»

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  • An adaptive carrier synchronization technique for robust 8-VSB DTV reception

    Page(s): 33 - 40
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1198 KB) |  | HTML iconHTML  

    In this paper, an adaptive digital frequency phase locked loop (FPLL) algorithm is proposed to improve the carrier recovery performance of 8-VSB receiver. The proposed carrier synchronization technique not only provides a robust 8-VSB DTV reception in fixed and indoor environments, but also makes it possible to watch the HDTV in portable environment. This is because the proposed technique dramatically reduces tracking jitter and acquisition time and enlarges acquisition range by adopting a sign detector, pilot extract filter bank, adaptive lock detector, mode selector, and loop filter bank to the conventional FPLL algorithm. View full abstract»

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  • High-performance arithmetic coding VLSI macro for the H264 video compression standard

    Page(s): 144 - 151
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (870 KB) |  | HTML iconHTML  

    This paper investigates the algorithmic complexity of arithmetic coding in the new H264 video coding standard and proposes a processor-coprocessor architecture to reduce it by more than an order of magnitude. The proposed coprocessor is based on an innovative algorithm known as the MZ-coder and maintains the original coding efficiency via a low-complexity, multiplication-free, non-stalling, fully pipelined architecture. The coprocessor achieves a constant throughput for both coding and decoding processes of 1 symbol per cycle and is designed to be attached to a controlling embedded RISC CPU whose instruction set has been extended with arithmetic coding instructions. View full abstract»

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  • Flicker reduction in MPEG-2 video by post-processing

    Page(s): 210 - 217
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (803 KB) |  | HTML iconHTML  

    Flicker is one of the artificial distortions of MPEG-2 coded video caused by the display's gamma characteristics and depends on the picture texture. In order to improve the picture quality, we have developed a technique of reducing the flicker by display gamma simulations in the decoded pictures. The effectiveness was confirmed by experiments. The process is less complex, and the implementation of this technique in digital TV receivers is expected to improve the coded picture quality. View full abstract»

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  • Research and implementation of the context-aware middleware for controlling home appliances

    Page(s): 301 - 306
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1230 KB) |  | HTML iconHTML  

    Smart homes integrated with sensors, actuators, wireless networks and context-aware middleware soon becomes part of our daily life. This paper describes a context-aware middleware providing an automatic home service based on a user's preference inside a smart home. The context-aware middleware includes an appliance controller, a context-aware agent and a scalable browser. The appliance controller takes charge of communication between appliances in the context-aware middleware. The context-aware middleware use OSGi (open service gateway initial) as the framework of the home network. The scalable browser recognizes the properties of all the rendering device, and it figures out their screen size. We use UlML (user interface markup language) as multiple rendering device. The context-aware agent utilizes 6 basic data values for learning and predicting the user's preference for the home appliances: the pulse, the body temperature, the facial expression, the room temperature, the time, and the location. The six data sets construct the context model and are used by the context manager module. The user profile manager maintains the history information for home appliances chosen by the user. The user-pattern learning and predicting module is based on a neural network, which predicts the proper home service for the user. The test results show that the pattern of an individual's preference can be effectively evaluated. View full abstract»

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  • Robust data transmission using the transmitter identification sequences in ATSC DTV signals

    Page(s): 41 - 47
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1180 KB) |  | HTML iconHTML  

    Transmitter identification (TxID, or transmitter fingerprinting) technique is used to detect, diagnose and classify the operating status of radio transmitters. Due to an ever-increasing number of transmitters, the need for transmitter identification is becoming an urgent issue, since it enables the broadcast authorities and operators to identify the source of interference. As a result, transmitter identification has been recognized as an important feature in the ATSC synchronization standard for distributed transmission. A new robust data transmission technique using the transmitter identification (TxID) sequences in the digital TV (DTV) signals is proposed in this paper. The major advantage of this low data transmission system is its robustness and extremely large coverage. The principle of the proposed data transmission system is presented. The modulation technique and throughput of the data transmission system is also evaluated. View full abstract»

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  • Acoustic intruder detection system for home security

    Page(s): 130 - 138
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1057 KB) |  | HTML iconHTML  

    This paper propose a new algorithm to detect the intruder in room. The basic idea of the proposed method is to estimate the variation of features of the room acoustic transfer function (RTF). The room transfer function is computed by cross-correlation method. There are some methods to measure the RFT. For example there are the image methods, ray tracing method to measure actually the RFT. In this we estimated RTF using white Gaussian noise that is broadband signal. It is important to extract feature vectors. Feature extraction is the process of computing a numerical representation. We used various features to detect intruder. The features based on the short time Fourier transform (STFT) and the zero-crossing rates were used. Several simulations and actually tests show that the proposed method provides good performance for intruder detection. View full abstract»

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  • IEEE 1394/UPnP software bridge

    Page(s): 319 - 323
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (742 KB) |  | HTML iconHTML  

    This paper presents the IEEE 1394/UPnP software bridge for representing legacy IEEE 1394 devices to UPnP devices. UPnP devices must provide SSDP discovery, SOAP control, and GENA event processes. To represent the legacy IEEE1394 devices to UPnP devices, there have to be the IEEE 1394/UPnP software bridge to provide those functionalities on behalf of IEEE 1394 devices. The bridge can provide additional functions such as A/V data transferring with format converting between IEEE 1394 and UPnP devices. With those functionalities, the bridge makes UPnP control points recognize IEEE 1394 devices as UPnP devices, and makes possible exchange the A/V data between IEEE 1394 legacy devices and normal UPnP devices. Based on the general structure of the bridge, it can be easily extended to support a new IEEE 1394 device type. View full abstract»

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  • Middleware for isochronous connection management in IEEE1394-IEC61883 based multimedia home network

    Page(s): 307 - 313
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1210 KB) |  | HTML iconHTML  

    The IEEE1394 is a favorable protocol for A/V networks recently in a home. The IEC61883 is a standard protocol which defines the communication and control interface for IEEE 1394 A/V devices. However, a common user in a home can not understand their internal operations because the IEEE1394 and IEC61883 are very complex protocols. The more nodes participate in the IEEE 1394 network, the more problems of resource exhaustion and connection repetition may occur. So this paper proposes a middleware for an isochronous connection management and a reliable multimedia data transmission in the IEEE 1394-IEC6I883 based multimedia home networks. In this paper, the proposed middleware supports the various types of isochronous connection and guarantees the reliability of isochronous connection as defining the convenient interface for controlling and monitoring A/V devices. In addition, the proposed middleware provides the characteristic of a real-time data transmission. We used CORBA API for multimedia service between A/V devices. The proposed architecture was implemented and verified using a test-bed. View full abstract»

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  • A 2K/8K mode small-area FFT processor for OFDM demodulation of DVB-T receivers

    Page(s): 28 - 32
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (960 KB) |  | HTML iconHTML  

    We present a novel implementation for 2K/8K dual-mode FFT (fast Fourier transform) for OFDM (orthogonal frequency division multiplexing) of DVB-T (digital video broadcasting terrestrial) receivers. Besides pipelining the FFT to reduce the area and enhance the data throughput, SDF (single-path delay feedback) butterfly units for radix-2 and radix-4 processing are adopted to resolve the power consumption difficulty and the P&R (place and route) problem. The SRAM is used in the butterfly units to relax the auto-refreshing requirement if DRAM is used such that not only is the dynamic power saved, the timing control is also less stingy. The 2K/8K FFT comprises 5/6 cascaded stages of radix-4 and one stage of radix-2 butterfly units. The proposed design is carried out by 0.35 μm 2P4M CMOS process to verify the high processing 8 MHz rate with power dissipation as low as 535 mW at a 16 MHz system clock. View full abstract»

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  • Dynamic range compression preserving local image contrast for digital video camera

    Page(s): 1 - 10
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1620 KB) |  | HTML iconHTML  

    This paper presents a novel dynamic range compression method for digital video cameras. The proposed algorithm is designed to preserve a local image contrast based on a luminance ratio of a pixel to its local surround in attention. In general, digital video cameras are required to maintain the shadow to middle range luminance that includes a main object such as a facial area. According to this requirement, most digital video cameras have adopted a knee curve as a dynamic range compression function that strongly compresses only the highlight range over the knee point. But this method has the weakness that severely lowers a highlight contrast. To overcome this weakness, the proposed algorithm automatically and adaptively enhances the local image contrast in the highlight regions. As a result, the highlight area such as blue sky is realistically reproduced without lowering the input luminance in the shadow to middle range. View full abstract»

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  • DSP-based multi-format video decoding engine for media adapter applications

    Page(s): 273 - 280
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (870 KB) |  | HTML iconHTML  

    There are four major components in a generic digital home framework: media center, set-top box, media adapter and portable viewer. In this paper, we present a DSP-based multi-format video decoding engine for realizing media adapter application. By choosing a powerful DSP core and designing an efficient and configurable software engine, the proposed solution is believed to possess low-cost and high-flexibility advantages at the same time. In our current implementation, the video decoding engine can decode most of the major video formats in the market, such as MPEG-1/2/4, H.264/AVC baseline/main, VC-I and its precedents, and some other MPEG-4-like formats. Simulation results demonstrate the efficiency of the decoding engine: videos up to SD resolution can be decoded seamlessly. The engine has been successfully integrated into an available media adapter module and the corresponding product. Our future work is to enhance the engine performance capable of handling HD contents. View full abstract»

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  • NTSC/PAL/SECAM digital video decoder with high-precision resamplers

    Page(s): 287 - 294
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1130 KB) |  | HTML iconHTML  

    This paper presents architecture of an all-digital multistandard video decoder that uses a single crystal oscillator of fixed frequency. The proposed digital video decoder requires no analog component and is based on a fully synchronous design. Resampling schemes that create line-locked sampling and burst-locked sampling are described. Phase jitter of 1 ns or less is achieved using 27 MHz clock, and 3-D (3-dimensional) Y/C separation becomes feasible in the free-running clock system. High-precision digital phase-locked loops and fractional delay filters implement resampling of video data, which eliminate the need for analog PLLs that generate clocks locked to input video. View full abstract»

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  • Slow motion replay of video sequences using fractal zooming

    Page(s): 103 - 111
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (811 KB) |  | HTML iconHTML  

    Slow motion replay is a special effect used in the video entertainment field. It consists in a presentation of a video scene at a rate display lower than the original. Already consolidated as a commercial feature of analog video players, today slow motion is likely to be extended to the digital environment. Purpose of this paper is to present a technique combining fractals (I. F. S.) and wavelets to obtain a subjectively pleasant zoom and slow motion of digital video sequences. Active scene detection and post processing techniques are used to reduce computational cost and improve visual quality respectively. This study shows that the proposed technique produces better results than the state of the art techniques based either on data replication or classical interpolation. View full abstract»

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  • Embedded 3D sound movement system based on feature extraction of head-related transfer function

    Page(s): 262 - 267
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1076 KB) |  | HTML iconHTML  

    VLSI implementation of a sound movement system is described, which is dedicated to mobile applications. This system is based on low cost 3D sound localization method, where feature extraction of head-related transfer function is attempted in order to realize the sound movement at all positions in 3D space by means of efficient coefficient storing scheme. The proposed system can be implemented by only 30,000 gates, which is small enough to mobile applications. Moreover, a prototype system is constructed by using an FPGA board and subjective tests are performed to evaluate the practicability of the proposed 3D sound movement system. View full abstract»

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  • Development of terrestrial DMB transmission system based on Eureka-147 DAB system

    Page(s): 63 - 68
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (895 KB) |  | HTML iconHTML  

    This paper introduces T-DMB transmission system in Korea based on Eureka-147 DAB and presents a new architecture of transmission system for digital multimedia services. For transmission of the digital multimedia contents in mobile environment by using the existing DAB, we developed a T-DMB processor which performs T-DMB encoding and insertion of the media stream into the existing DAB transmission system. After the implemented T-DMB processor can be connected to the front of the commercial Eureka-J47 DAB system, and the performance of the T-DMB system is confirmed through the T-DMB experimental broadcasting in Korea. View full abstract»

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  • On enhancing H.264/AVC video rate control by PSNR-based frame complexity estimation

    Page(s): 281 - 286
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (695 KB) |  | HTML iconHTML  

    In this paper, we present a PSNR-based frame complexity estimation to improve H.264/AVC rate control. Our scheme is based on adding PSNR-based complexity estimation to the existing mean absolute difference based (MAD-based) complexity measure to form s combined frame complexity estimation. The aim is to allocate bits more accurately, especially for frames with scene changes and high motions. Bit allocation to each frame is not just computed by encoder buffer status but also by a combined frame complexity measure. The quadratic rate-quantization (R-Q) model is used to determine the quantization parameter (QP) for each frame and the computed QP is further adjusted in two special cases. We also propose a frame skipping decision scheme to improve the performance at high frame rates. Simulation results show that the H.264 coder, using our proposed scheme, achieves better visual performances with similar or smaller PSNR deviations when compared to that of the recent JMS.6 rate control. View full abstract»

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  • DTV architecture design for multimedia network environments

    Page(s): 324 - 328
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (702 KB) |  | HTML iconHTML  

    This paper proposes a novel architecture for DTV (digital TV) using middleware based on UPnP™ (universal plug and play) and DLNA (digital living networking alliance) to enable interoperability with a variety of digital CE devices supporting content of diverse formats transported over IP (Internet protocol) and IEEE 1394. Additionally, content metadata, capability discovery, and format transcoding features are included to match the device capabilities with media formats to enable rendering of content on diverse digital CE devices interacting with the DTV. View full abstract»

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  • Real-time embedded face recognition for smart home

    Page(s): 183 - 190
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1001 KB) |  | HTML iconHTML  

    We propose a near real-time face recognition system for embedding in consumer applications. The system is embedded in a networked home environment and enables personalized services by automatic identification of users. The aim of our research is to design and build a face recognition system that is robust for natural consumer environments and can be executed on low-cost hardware. For enabling distribution of computations, we propose a processing pipeline for face recognition, which consists of (I) face detection by stepwise pruning; (2) coarse-to-fine facial feature extraction for face normalization; and (3) face identification by cascaded discriminant analysis. The system has been applied in varying environments, such as an experimental home network, and achieves over 95% recognition rate and 3-4 frames/s processing speed. View full abstract»

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  • A multi-standard video accelerator based on a vector architecture

    Page(s): 160 - 167
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (842 KB) |  | HTML iconHTML  

    A multi-standard video encoding coprocessor is presented that efficiently accelerates MPEG-2, MPEG-4 (XViD) and a proprietary H.264 encoder. The proposed architecture attaches to a configurable, extensible RISC CPU to form a highly efficient solution to the computational complexity of current and emerging video coding standards. A subset of the ISA has been implemented as a VLSI macrocell for a high performance 0.13 μm silicon process. View full abstract»

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  • Enhancement of wireless LAN for multimedia home networking

    Page(s): 80 - 86
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1183 KB) |  | HTML iconHTML  

    This paper describes the problems of wireless LAN usage in the user's home with focus on high quality, real-time media transmission. Results of physical channel measurements with respect to fading effects and channel power are analyzed and experimentally obtained link data rates are presented. Methods for a transmitter based link adaptation are described and evaluated to increase the reliability of the physical data transmission. View full abstract»

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Aims & Scope

The primary purpose for publishing the Transactions of the Consumer Electronics Society is to present to the membership and the engineering community in general, papers on new technology oriented to Consumer Electronics.

 

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
R. Simon Sherratt
School Director for Teaching and Learning, School of Systems Engineering
The University of Reading
Reading, Berkshire  RG6 6AY  RG6 6AY  U.K.
r.s.sherratt@reading.ac.uk; sherratt@ieee.org
Phone:+44 (0) 118 3788588
Fax:+44 (0) 118 3788583