By Topic

Circuits and Systems I: Regular Papers, IEEE Transactions on

Issue 1 • Date Jan. 2005

Filter Results

Displaying Results 1 - 25 of 31
  • Table of contents

    Publication Year: 2005 , Page(s): c1 - c4
    Save to Project icon | Request Permissions | PDF file iconPDF (95 KB)  
    Freely Available from IEEE
  • IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

    Publication Year: 2005 , Page(s): c2
    Save to Project icon | Request Permissions | PDF file iconPDF (36 KB)  
    Freely Available from IEEE
  • Sub-1-V design techniques for high-linearity multistage/pipelined analog-to-digital converters

    Publication Year: 2005 , Page(s): 1 - 12
    Cited by:  Papers (8)  |  Patents (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1016 KB) |  | HTML iconHTML  

    The design of an ultra-low-voltage multistage (two-stage algorithmic) analog-to-digital converter (ADC) employing the opamp-reset switching technique is described. A highly linear input sampling circuit accommodates truly low-voltage sampling from external input signal source. A radix-based digital calibration technique is used to compensate for component mismatches and reduced opamp gain under low supply voltage. The radix-based scheme is based on a half-reference multiplying digital-to-analog converter structure, where the error sources seen by both the reference and input signal paths are made identical for a given stage. The prototype ADC was fabricated in a 0.18-μm CMOS process. The prototype integrated circuit dissipates 9 mW at 0.9-V supply with an input signal range of 0.9 Vp-p differential. The calibration of the ADC improves the signal-to-noise-plus-distortion ratio from 40 to 55 dB and the spurious-free dynamic range from 47 to 75 dB. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A general-purpose processor-per-pixel analog SIMD vision chip

    Publication Year: 2005 , Page(s): 13 - 20
    Cited by:  Papers (53)  |  Patents (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (992 KB) |  | HTML iconHTML  

    A smart-sensor VLSI circuit suitable for focal-plane low-level image processing applications is presented. The architecture of the device is based on a fine-grain software-programmable SIMD processor array. Processing elements, integrated within each pixel of the imager, are implemented utilising a switched-current analog microprocessor concept. This allows the achievement of real-time image processing speeds with high efficiency in terms of silicon area and power dissipation. The prototype 21 × 21 vision chip is fabricated in a 0.6 μm CMOS technology and achieves a cell size of 98.6 μm × 98.6 μm. It executes over 1.1 giga instructions per second (GIPS) while dissipating under 40 mW of power. The architecture, circuit design and experimental results are presented in this paper. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A design-oriented study of the nonlinear dynamics of digital bang-bang PLLs

    Publication Year: 2005 , Page(s): 21 - 31
    Cited by:  Papers (56)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (616 KB) |  | HTML iconHTML  

    The use of bang-bang phase-locked loops (BBPLLs) has become increasingly common in a lot of communications systems, in particular in the area of clock and data recovery. Although most of the BBPLLs implemented up to now use analog loop filters, the binary output of the phase detector naturally lends itself to a digital implementation. In this paper, the nonlinear dynamics of first- and second-order digital BBPLLs is analyzed from a design perspective. In particular, the effects of loop delays on the PLL performances are emphasized. Conditions for the existence of orbits (limit cycles) are derived, and the timing jitter performances are evaluated. Finally, useful expressions for the design and optimization of the PLL parameters for low jitter are given. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Background interstage gain calibration technique for pipelined ADCs

    Publication Year: 2005 , Page(s): 32 - 43
    Cited by:  Papers (40)  |  Patents (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (584 KB) |  | HTML iconHTML  

    A background self-calibration technique is proposed that can correct both linear and nonlinear errors in the interstage amplifiers of pipeline and algorithmic analog-to-digital converters (ADCs). Stage redundancy in a pipeline architecture is exploited to measure gain errors that are corrected using digital post-processing. The proposed technique allows faster convergence and has less dependence on input signal statistics than a similar technique described by Murmann and Boser. Simulation results are presented for a 12-bit pipelined ADC architecture, similar to that described by Murmann and Boser, using nonideal interstage residue amplifiers. With calibration, the simulations show a signal-to-noise-and-distortion-ratio performance of 72 dB and a spurious-free dynamic range performance of 112 dB, with calibration tracking time constants of approximately 8×105 sample periods, which is over ten times faster than that reported by Murmann and Boser at a similar performance level. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • ESD protection design for mixed-voltage I/O buffer with substrate-triggered circuit

    Publication Year: 2005 , Page(s): 44 - 53
    Cited by:  Papers (5)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (848 KB) |  | HTML iconHTML  

    A substrate-triggered technique is proposed to improve the electrostatic discharge (ESD) robustness of a stacked-nMOS device in the mixed-voltage I/O circuit. The substrate-triggered technique can further lower the trigger voltage of a stacked-nMOS device to ensure effective ESD protection for mixed-voltage I/O circuits. The proposed ESD protection circuit with substrate-triggered design for a 2.5-V/3.3-V-tolerant mixed-voltage I/O circuit has been fabricated and verified in a 0.25-μm salicided CMOS process. The substrate-triggered circuit for a mixed-voltage I/O buffer to meet the desired circuit application in different CMOS processes can be easily adjusted by using HSPICE simulation. Experimental results have confirmed that the human- body-model (HBM) ESD robustness of a mixed-voltage I/O circuit can be increased ∼60% by this substrate-triggered design. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A generic approach to the theory of superregenerative reception

    Publication Year: 2005 , Page(s): 54 - 70
    Cited by:  Papers (52)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (688 KB) |  | HTML iconHTML  

    The superregenerative receiver has been widely used for many decades in short-range wireless communications because of its relative simplicity, reduced cost, and low power consumption. However, the theory that describes the behavior of this type of receiver, which was mainly developed prior to 1950, is of limited scope, since it applies to particular implementations, usually operating under continuous-wave signal or narrow-band modulation. As a novelty, we present the theory of superregenerative reception from a generic point of view. We develop an analytic study based on a generic block diagram of the receiver and consider not only narrow-band, but a wider variety of input signals. The study allows general results and conclusions that can be easily particularized to specific implementations to be obtained. Starting from the proposed model, the differential equation that describes the operation of the receiver in the linear mode is deducted and solved. Normalized parameters and functions characterizing the performance of the receiver are presented, as well as the requirements for proper operation. Several characteristic phenomena, such as hangover and multiple resonance, are described. The nonlinear behavior of the active device is also modeled to obtain a solution of the differential equation in the logarithmic mode of operation. The study is completed with a practical example operating at 2.4 GHz and illustrating the typical performance of a superregenerative receiver. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A novel noise efficient feedback DAC within a switched capacitor ΣΔ ADC

    Publication Year: 2005 , Page(s): 71 - 78
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (520 KB) |  | HTML iconHTML  

    Efficient sampling of the reference noise within a bilinear switched capacitor ΣΔ analog-to-digital converter (ADC), resulting in improved thermal noise performance is presented. Bilinear integrators contain a zero at the Nyquist frequency, with the result that no charge is transferred from the reference when a transition occurs in the modulator output. The average noise power added by the reference digital-to-analog converter (DAC) can be reduced substantially if the reference DAC is sampled only when charge is to be transferred. For midscale inputs, the sampled noise from a single bit reference DAC is reduced by more than 5 dB. When multibit quantization and feedback is used the reference noise can be further suppressed, in the case of 5 bits of feedback the reference noise is reduced by more than 20 dB. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Reconfigurable biologically inspired visual motion systems using modular neuromorphic VLSI chips

    Publication Year: 2005 , Page(s): 79 - 92
    Cited by:  Papers (17)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (880 KB) |  | HTML iconHTML  

    Visual motion information provides a variety of clues that enable biological organisms from insects to primates to efficiently navigate in unstructured environments. We present modular mixed-signal very large-scale integration (VLSI) implementations of the three most prominent biological models of visual motion detection. A novel feature of these designs is the use of spike integration circuitry to implement the necessary temporal filtering. We show how such modular VLSI building blocks make it possible to build highly powerful and flexible vision systems. These three biomimetic motion algorithms are fully characterized and compared in performance. The visual motion detection models are each implemented on separate VLSI chips, but utilize a common silicon retina chip to transmit changes in contrast, and thus four separate mixed-signal VLSI designs are described. Characterization results of these sensors show that each has a saturating response to contrast to moving stimuli, and that the direction of motion of a sinusoidal grating can be detected down to less than 5% contrast, and over more than an order of magnitude in velocity, while retaining modest power consumption. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Current-mode differential wave active filters

    Publication Year: 2005 , Page(s): 93 - 98
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (416 KB) |  | HTML iconHTML  

    A technique for obtaining differential active filters suitable for integrated circuit implementation is presented. These filters, based on current-mode differential-wave active blocks, can operate at high frequencies. The cutoff frequency can by tuned by the bias current. The proposed filter topologies are modular and very flexible for both the electronic and the physical design. Simulation results of a third-order elliptic filter, designed in a 0.35-μm CMOS technology, are presented. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An ON-OFF log domain circuit that recreates adaptive filtering in the retina

    Publication Year: 2005 , Page(s): 99 - 107
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (640 KB) |  | HTML iconHTML  

    We introduce a new approach to synthesizing Class AB log-domain filters that satisfy dynamic differential-mode and common-mode constraints simultaneously. Whereas the dynamic differential-mode constraint imposes the desired filtering behavior, the dynamic common-mode constraint solves the zero-dc-gain problem, a shortcoming of previous approaches. Also, we introduce a novel push-pull circuit that serves as a current-splitter; it rectifies a differential signal into the ON and OFF paths in our log-domain filter. As an example, we synthesize a first-order low-pass filter, and, to demonstrate the rejection of dc signals, we implement an adaptive filter by placing this low-pass circuit in a variable-gain negative-feedback path. Feedback gain is controlled by signal energy, which is extracted simply by summing complementary ON and OFF signals-dc signals do not contribute to the signal energy nor are they amplified by the feedback. We implement this adaptive filter design in a silicon chip that draws biological inspiration from visual processing in the mammalian retina. It may also be useful in other applications that require dynamic time-constant adaptation. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Pipelined array-based FIR filter folding

    Publication Year: 2005 , Page(s): 108 - 118
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (584 KB) |  | HTML iconHTML  

    The elaborate design of folded finite-impulse response (FIR) filters based on pipelined multiplier arrays is presented in this paper. The design is considered at the bit-level and the internal delays of the pipelined multiplier array are fully exploited in order to reduce hardware complexity. Both direct and transposed FIR filter forms are considered. The carry-save and the carry-propagate multiplier arrays are studied for the filter implementations. Partially folded architectures are also proposed which are implemented by cascading a number of folded FIR filters. The proposed schemes are compared as to the aspect of hardware complexity with a straightforward implementation of a folded FIR filter based on the pipelined Wallace Tree multiplier. The comparison reveals that the proposed schemes require 20%-30% less hardware. Finally, efficient implementation of partially folded FIR filter circuits is presented when constraints in area, power consumption and clock frequency are given. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Practical measurement of timing jitter contributed by a clock-and-data recovery circuit

    Publication Year: 2005 , Page(s): 119 - 126
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (424 KB) |  | HTML iconHTML  

    This paper describes a measurement of high-frequency jitter contributed by a clock-and-data recovery circuit. The contributed jitter is expressed with deterministic and random jitter terms and is given for a specific bit sequence. The measurement is illustrated on two multichannel CMOS serializer/deserializer chips applicable to 10-G Ethernet, 10-G Fibre Channel, and InfiniBand at per-channel rates of 2.5 and 3.125 GBaud. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Trajectory-based optimal linearization for nonlinear autonomous vector fields

    Publication Year: 2005 , Page(s): 127 - 138
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (528 KB) |  | HTML iconHTML  

    This paper deals with an optimal approximation in the least square sense of nonlinear vector fields. The optimal approximation consists of a linearization along a trajectory that approximates the nonlinear solution from the initial state to the equilibrium position. It is shown that the optimal linearization can be seen as a generalization of the classical linearization. Furthermore, the optimal linearization can approximate the derivative at the equilibrium point, and the order of the method is the same as the nonlinearity, since the approximation depends on the initial state. We also show that the method can be used to study the asymptotic stability of the equilibrium of a nonlinear vector fields, especially in the nonhyperbolic case. Simulation shows good agreement between the linearized and the nonlinear systems. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A topological approach to the identification of critical measurements in power-system state estimation

    Publication Year: 2005 , Page(s): 139 - 147
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (376 KB) |  | HTML iconHTML  

    This work presents a new topological methodology for critical measurements identification in observable networks. A measurement is said to be critical, in an observability sense, if its removal from the measurement set makes the associated system lose observability. The proposed methodology is based on the properties of both, observable measurement subnetworks (OMS) and redundant branch sets (RBS), for the first time proposed. To reduce the combinatorial bluster, the proposed method divides the measurements into two groups and classifies them into two phases. It allows identifying the critical measurements without any numerical calculation. Indeed, it is simple and fast. To clarify the proposed method and to demonstrate its simplicity, two examples are provided. The proposed method is successfully tested in the IEEE-14 bus system as well as in two realistic systems of Brazilian utilities. The first is a 121-bus system by ELETROSUL, and the other is a 383-bus system by Companhia Hidroele´trica do Sa˜o Francisco (CHESF). View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Design of arbitrary-phase variable digital filters using SVD-based vector-array decomposition

    Publication Year: 2005 , Page(s): 148 - 167
    Cited by:  Papers (26)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1136 KB) |  | HTML iconHTML  

    This paper proposes a straightforward method for designing variable digital filters with arbitrary variable magnitude as well as arbitrary fixed-phase or variable fractional delay (VFD) responses. The basic idea is to avoid the complicated direct design of one-dimensional (1-D) variable digital filters by decomposing the original variable filter design problem into easier subproblems that only require constant 1-D filter designs and multidimensional polynomial approximations. Through constant 1-D filter designs and multidimensional polynomial fits, we can easily obtain a variable digital filter satisfying the given variable design specifications. To decompose the original variable filter design into constant 1-D filter designs and multidimensional polynomial fits, a new multidimensional complex array decomposition called vector array decomposition (VAD) is proposed, which is based on two new theorems using the singular value decomposition (SVD). Once the VAD is obtained, the subproblems can be easily solved. Furthermore, we show that the VAD can also be generalized to the weighted least squares (WLS) case (WLS-VAD) for the WLS variable filter design. Three design examples are given to illustrate that the WLS-VAD and VAD-based techniques are considerably efficient for designing variable digital filters with arbitrary variable magnitude and arbitrary fixed-phase or VFD responses. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Stability analysis of nonlinear power electronic systems utilizing periodicity and introducing auxiliary state vector

    Publication Year: 2005 , Page(s): 168 - 178
    Cited by:  Papers (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (776 KB) |  | HTML iconHTML  

    Variable-structure piecewise-linear nonlinear dynamic feedback systems emerge frequently in power electronics. This paper is concerned with the stability analysis of these systems. Although it applies the usual well-known and widely used approach, namely, the eigenvalues of the Jacobian matrix of the Poincare´ map function belonging to a fixed point of the system to ascertain the stability, this paper offers two contributions for simplification as well that utilize the periodicity of the structure or configuration sequence and apply an alternative simpler and faster method for the determination of the Jacobian matrix. The new method works with differences of state variables rather than derivatives of the Poincare´ map function (PMF) and offers geometric interpretations for each step. The determination of the derivates of PMF is not needed. A key element is the introduction of the so-called auxiliary state vector for preserving the switching instant belonging to the periodic steady-state unchanged even after the small deviations of the system orbit around the fixed point. In addition, the application of the method is illustrated on a resonant dc-dc buck converter. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Semi-blind identification of ARMA systems using a dynamic-based approach

    Publication Year: 2005 , Page(s): 179 - 190
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (608 KB) |  | HTML iconHTML  

    A novel dynamic-based semi-blind approach is proposed to identify an autoregressive and moving average (ARMA) system in this paper. By using a chaotic driving signal, an ARMA system can be identified accurately by a dynamic-based estimation method called the ergodic-based minimum phase space volume (EMPSV). A maximum-likelihood formulation of EMPSV is provided to certify its unbiasedness and asymptotical efficiency. Monte Carlo simulations show that the EMPSV approach has a smaller mean-square error performance than the minimum phase space volume method and the conventional identification approach based on least-squares estimation with white Gaussian probing signals. The proposed approach is then applied to blind deconvolution of real audio signals and semi-blind channel equalization for chaos communications. It is shown that the EMPSV approach has improved deconvolution and equalization performances compared to conventional techniques in both applications. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • The determination of S-parameters from the poles of voltage-gain transfer function for RF IC design

    Publication Year: 2005 , Page(s): 191 - 199
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (688 KB) |  | HTML iconHTML  

    A method for estimating the S-parameters of active circuits using hand analysis is introduced. This method involves the determination of S-parameters from the poles of voltage-gain transfer function. It is found that the information on the frequency responses of input/output return loss, input/output impedance, and reverse isolation is all hidden in the poles or equivalently in the denominator of the voltage-gain transfer function of a circuit system. The method has been applied to three commonly used RF circuit configurations and one fabricated CMOS wide-band amplifier to illustrate the usefulness of the proposed theory. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A positively self-feedbacked Hopfield neural network architecture for crossbar switching

    Publication Year: 2005 , Page(s): 200 - 206
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (328 KB) |  | HTML iconHTML  

    We propose a positively self-feedbacked Hopfield neural network architecture for efficiently solving crossbar switch problem. A binary Hopfield neural network architecture with additional positive self-feedbacks and its collective computational properties are studied. It is proved theoretically and confirmed by simulating the randomly generated Hopfield neural network with positive self-feedbacks that the emergent collective properties of the original Hopfield neural network also are present in this network architecture. The network architecture is applied to crossbar switching and results of computer simulations are presented and used to illustrate the computation power of the network architecture. The simulation results show that the Hopfield neural network architecture with positive self-feedbacks is much better than the previous works including the original Hopfield neural network architecture, Troudet's architecture and maximum neural network for crossbar switching in terms of both the computation time and the solution quality. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An on-line ICA-mixture-model-based self-constructing fuzzy neural network

    Publication Year: 2005 , Page(s): 207 - 221
    Cited by:  Papers (9)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1296 KB) |  | HTML iconHTML  

    This paper proposes a new fuzzy neural network (FNN) capable of parameter self-adapting and structure self-constructing to acquire a small number of fuzzy rules for interpreting the embedded knowledge of a system from the given training data set. The proposed FNN is inherently a modified Takagi-Sugeno-Kang (TSK)-type fuzzy-rule-based model with neural network's learning ability. There are no rules initiated at the beginning and they are created and adapted through an on-line learning processing that performs simultaneous structure and parameter identification. In the structure identification of the precondition part, the input space is partitioned in a flexible way according to the newly proposed on-line independent component analysis (ICA) mixture model. The input space is thus represented by linear combinations of independent, non-Gaussian densities. The first input training pattern is assigned to the first rule initially by the on-line ICA mixture model. Afterwards, some additional significant terms (input variables) selected by the on-line ICA mixture model will be added to the consequent part (forming a liner equation of input variables) incrementally or create a new rule in the learning processing. The combined precondition and consequent structure identification scheme can make the network grow dynamically and efficiently. In the parameter identification, the consequent parameters are tuned by the backpropagation rule and the precondition parameters are turned by the on-line ICA mixture model. Both the structure and parameter identifications are done simultaneously to form a fast learning scheme. The derived on-line ICA mixture model also provide a natural linear transformation for each input variable to enhance the knowledge representation ability of the proposed FNN and reduce the required rules and achieve higher accuracy efficiently. In order to demonstrate the performance of the proposed FNN, several experiments covering the areas of system identification, classification, and image segmentation are carried out. Our experiments show that the proposed FNN can achieve significant improvements in the convergence speed and prediction accuracy with simpler network structure. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Smooth perturbation on a classical energy function for lossy power system stability analysis

    Publication Year: 2005 , Page(s): 222 - 229
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (680 KB) |  | HTML iconHTML  

    The efforts to find Lyapunov functions for power systems with losses have been until now in vain. Despite that, engineers have been using approximated energy-like functions to obtain good estimates of the critical clearing time (CCT) in transient stability analysis of power systems. These approximated energy-like functions are not Lyapunov functions, and are usually obtained by an integration process followed by an approximation of the integration path. Therefore, the good CCT estimates obtained with these functions are not supported by a sound theory. Nevertheless, it is shown in this paper, for a particular approximated energy-like function, a theoretical approach to support these good estimates. The approximated energy-like function studied in this paper is well known in the literature, and was proposed by Athay et al. in the COA formulation. It is shown that this approximated energy-like function is neither a Lyapunov function in the usual sense, nor an extended Lyapunov function, when the transfer conductances are taken into account. In spite of that, a function attending the requirements of the extension of the Invariance Principle, that is, an extended Lyapunov function, can be obtained by smooth perturbations on that energy-like function. This perturbed function can be used to estimate the attraction area without approximations or conjectures. Indeed, the difference between the proposed extended Lyapunov function and the approximated energy-like function has the order of a smooth perturbation. This fact supports the good CCT estimates that have been obtained using these approximated energy-like functions, and encourages engineers to keep using them for CCT estimates. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A new LMS-based Fourier analyzer in the presence of frequency mismatch and applications

    Publication Year: 2005 , Page(s): 230 - 245
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (936 KB) |  | HTML iconHTML  

    The performance of the conventional least mean square (LMS) Fourier analyzer may degenerate significantly, if the signal frequencies given to the analyzer are different from the true signal frequencies. This difference is referred to as frequency mismatch (FM). We first analyze the performance of the conventional LMS Fourier analyzer for a single sinusoid in the presence of FM. We derive the dynamics and steady-state properties of this analyzer as well as the optimum step size parameter which minimizes the influence of the FM. Extensive simulations reveal the validity of the analytical results. Next, a new LMS-based Fourier analyzer is proposed which simultaneously estimates the discrete Fourier coefficients (DFCs) and accommodates the FM. This new analyzer can very well compensate for the performance degeneration due to the FM. Applications to estimation/detection of dual-tone multiple frequencies (DTMF) signals and analysis of real-life noise signals generated by a large-scale factory cutting machine are provided to demonstrate the excellent performance of our new Fourier analyzer. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Special issue on biomedical circuits and systems: A new wave of technology

    Publication Year: 2005 , Page(s): 246
    Save to Project icon | Request Permissions | PDF file iconPDF (115 KB)  
    Freely Available from IEEE

Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Shanthi Pavan
Indian Institute of Technology, Madras