Solid-State Circuits, IEEE Journal of
Issue 11 • Date Nov. 2004
Society Sponsor
Filter Results
Displaying Results 1 - 25 of 38
-
[Front cover]
|
PDF (42 KB)
-
IEEE Journal of Solid-State Circuits publication information
|
PDF (45 KB)
-
Table of contents
|
PDF (41 KB)
-
A 12-bit 20-Msample/s pipelined analog-to-digital converter with nested digital background calibration
|
PDF (920 KB)
-
-
A 2-GHz analog-to-digital delta-sigma modulator for CDMA receivers with 79-dB signal-to-noise ratio in 1.23-MHz bandwidth
|
PDF (936 KB)
-
-
A 100-ps time-resolution CMOS time-to-digital converter for positron emission tomography imaging applications
|
PDF (1680 KB)
-
A quadrature digital synthesizer/mixer architecture using fine/coarse coordinate rotation to achieve 14-b input, 15-b output, and 100-dBc SFDR
|
PDF (1320 KB)
-
-
-
-
-
An 8-Gb/s capacitively coupled receiver with high common-mode rejection for uncoded data
|
PDF (1160 KB)
-
-
A capacitance-compensation technique for improved linearity in CMOS class-AB power amplifiers
|
PDF (928 KB)
-
High-speed driving scheme and compact high-speed low-power rail-to-rail class-B buffer amplifier for LCD applications
|
PDF (784 KB)
-
-
Analysis and design of HBT Cherry-Hooper amplifiers with emitter-follower feedback for optical communications
|
PDF (1048 KB)
-
-
-
-
-
-
Virtual-ground sensing techniques for a 49-ns/200-MHz access time 1.8-V 256-Mb 2-bit-per-cell flash memory
|
PDF (880 KB)
Aims & Scope
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.
Meet Our Editors
Editor-in-Chief
Un-Ku Moon
Oregon State University, EECS
