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Circuits and Systems Magazine, IEEE

Issue 2 • Date 2004

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Displaying Results 1 - 12 of 12
  • 2003 CASS fellows

    Publication Year: 2004 , Page(s): 37 - 40
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  • Drift compensation for reduced spatial resolution transcoding: a summary

    Publication Year: 2004 , Page(s): 32 - 36
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    This paper discusses the problem of reduced-resolution transcoding of compressed video bitstreams. An analysis of drift errors is provided to identify the sources of quality degradation when transcoding to a lower spatial resolution. Two types of drift error are considered: a reference picture error, which has been identified in previous works, and error due to the noncommutative property of motion compensation and down-sampling, which is unique to this work. To overcome these sources of error, four novel architectures are presented. One architecture attempts to compensate for the reference picture error in the reduced resolution, while another architecture attempts to do the same in the original resolution. We present a third architecture that attempts to eliminate the second type of drift error and a final architecture that relies on an intrablock refresh method to compensate for all types of errors. In all of these architectures, a variety of macroblock level conversions are required, such as motion vector mapping and texture down-sampling. These conversions are discussed in detail. Another important issue for the transcoder is rate control. This is especially important for the intra-refresh architecture since it must find a balance between number of intrablocks used to compensate for errors and the associated rate-distortion characteristics of the low-resolution signal. The complexity and quality of the architectures are compared. Based on the results, we find that the intra-refresh architecture offers the best tradeoff between quality and complexity and is also the most flexible. View full abstract»

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  • Equalization in high-speed communication systems

    Publication Year: 2004 , Page(s): 4 - 17
    Cited by:  Papers (48)  |  Patents (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1278 KB) |  | HTML iconHTML  

    The article first discusses the major non-ideal issues of low-cost transmission media for over Gbps data transmissions - the frequency dispersion loss and channel noise. The former causes ISI in received signal, which presents difficulty for clock and data recovery at high frequencies and results higher BER. The latter further degrades the received signal quality and further limits the data transmission rate and transmission distance. Then, two equalization approaches - transmitter pre-emphasis and receiver equalization, are reviewed, in addition to various adaptation criteria and algorithms. View full abstract»

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  • Xpipes: a network-on-chip architecture for gigascale systems-on-chip

    Publication Year: 2004 , Page(s): 18 - 31
    Cited by:  Papers (143)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (901 KB) |  | HTML iconHTML  

    The growing complexity of embedded multiprocessor architectures for digital media processing will soon require highly scalable communication infrastructures. Packet switched networks-on-chip (NoC) have been proposed to support the trend for systems-on-chip integration. In this paper, an advanced NoC architecture, called Xpipes, targeting high performance and reliable communication for on-chip multi-processors is introduced. It consists of a library of soft macros (switches, network interfaces and links) that are design-time composable and tunable so that domain-specific heterogeneous architectures can be instantiated and synthesized. Links can be pipelined with a flexible number of stages to decouple link throughput from its length and to get arbitrary topologies. Moreover, a tool called XpipesCompiler, which automatically instantiates a customized NoC from the library of soft network components, is used in this paper to test the Xpipes-based synthesis flow for domain-specific communication architectures. View full abstract»

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  • IEEE Circuits and Systems Magazine

    Publication Year: 2004 , Page(s): 0_1
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    Freely Available from IEEE
  • Call for Papers

    Publication Year: 2004 , Page(s): 0_2
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    Freely Available from IEEE
  • IEEE Circuits and Systems Magazine - Table of contents

    Publication Year: 2004 , Page(s): 1 - 2
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  • From the Editor

    Publication Year: 2004 , Page(s): 3
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  • Call for papers

    Publication Year: 2004 , Page(s): 35
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    Freely Available from IEEE
  • IEEE Computer Society Library Subscription Plan-Electronic

    Publication Year: 2004 , Page(s): 39
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    Freely Available from IEEE
  • Calls for papers and participation

    Publication Year: 2004 , Page(s): 41
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  • Workshop announcement

    Publication Year: 2004 , Page(s): 42
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Aims & Scope

Insofar as the technical articles presented in the proposed magazine, the plan is to cover the subject areas represented by the Society's transactions, including: analog, passive, switch capacitor, and digital filters; electronic circuits, networks, graph theory, and RF communication circuits; system theory; discrete, IC, and VLSI circuit design; multidimensional circuits and systems; large-scale systems and power networks; nonlinear circuits and systems, wavelets, filter banks, and applications; neural networks; and signal processing.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Chi K. Tse
Hong Kong Polytechnic University