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IEEE Transactions on Computers

Issue 9 • Date Sept. 2004

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Displaying Results 1 - 17 of 17
  • [Front cover]

    Publication Year: 2004, Page(s): c1
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  • [Inside front cover]

    Publication Year: 2004, Page(s): c2
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  • Improving data locality by array contraction

    Publication Year: 2004, Page(s):1073 - 1084
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1080 KB) | HTML iconHTML Multimedia Media

    Array contraction is a program transformation which reduces array size while preserving the correct output. In this paper, we present an aggressive array-contraction technique and study its impact on memory system performance. This technique, called controlled SFC, combines loop shifting and controlled loop fusion to maximize opportunities for array contraction within a given loop nesting. A contr... View full abstract»

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  • Algorithm and architecture for logarithm, exponential, and powering computation

    Publication Year: 2004, Page(s):1085 - 1096
    Cited by:  Papers (34)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1376 KB) | HTML iconHTML

    An architecture for the computation of logarithm, exponential, and powering operations is presented in this paper, based on a high-radix composite algorithm for the computation of the powering function (XY). The algorithm consists of a sequence of overlapped operations: 1) digit-recurrence logarithm, 2) left-to-right carry-free (LRCF) multiplication, and 3) online exponential. A redunda... View full abstract»

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  • A generalized method for constructing subquadratic complexity GF(2/sup k/) multipliers

    Publication Year: 2004, Page(s):1097 - 1105
    Cited by:  Papers (33)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (240 KB) | HTML iconHTML Multimedia Media

    We introduce a generalized method for constructing subquadratic complexity multipliers for even characteristic field extensions. The construction is obtained by recursively extending short convolution algorithms and nesting them. To obtain the short convolution algorithms, the Winograd short convolution algorithm is reintroduced and analyzed in the context of polynomial multiplication. We present ... View full abstract»

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  • Transient analysis of some rewarded Markov models using randomization with quasistationarity detection

    Publication Year: 2004, Page(s):1106 - 1120
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (918 KB) | HTML iconHTML Multimedia Media

    Rewarded homogeneous continuous-time Markov chain (CTMC) models can be used to analyze performance, dependability and performability attributes of computer and telecommunication systems. In this paper, we consider rewarded CTMC models with a reward structure including reward rates associated with states and two measures summarizing the behavior in time of the resulting reward rate random variable:... View full abstract»

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  • On maximizing the fault coverage for a given test length limit in a synchronous sequential circuit

    Publication Year: 2004, Page(s):1121 - 1133
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2680 KB) | HTML iconHTML

    When storage requirements or limits on test application time do not allow a complete (compact) test set to be used for a circuit, a partial test set that detects as many faults as possible is required. Motivated by this application, we address the following problem. Given a test sequence T of length L for a synchronous sequential circuit and a length MS of leng... View full abstract»

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  • Automatic generation of diagnostic memory tests based on fault decomposition and output tracing

    Publication Year: 2004, Page(s):1134 - 1146
    Cited by:  Papers (9)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1264 KB) | HTML iconHTML

    A novel approach to automatic generation of diagnostic memory tests based on fault decomposition and output tracing is described. Fault decomposition allows fault models that precisely describe the fault effects of a specific technology to be considered during test generation; therefore, overtesting of the memory-under-test is avoided. Output tracing of failing memory cells allows for distinguishi... View full abstract»

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  • Structural and dynamic changes in concurrent systems: reconfigurable Petri nets

    Publication Year: 2004, Page(s):1147 - 1158
    Cited by:  Papers (33)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (584 KB) | HTML iconHTML

    The aim of this work is the modeling and verification of concurrent systems subject to dynamic changes using extensions of Petri nets. We begin by introducing the notion of net rewriting system. In a net rewriting system, a system configuration is described as a Petri net and a change in configuration is described as a graph rewriting rule. We show that net rewriting systems are Turing powerful, t... View full abstract»

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  • Fast, best-effort real-time scheduling algorithms

    Publication Year: 2004, Page(s):1159 - 1175
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1280 KB) | HTML iconHTML

    This paper presents two fast, best-effort real-time scheduling algorithms called MDASA and MLBESA. MDASA and MLBESA are novel in the way that they heuristically, yet accurately, mimic the behavior of the DASA and LBESA scheduling algorithms, but are faster with O(n) and O(n lg(n)) worst-case complexities, respectively. Experimental results show that the performance of MDASA and MLBESA, in general,... View full abstract»

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  • On scheduling mesh-structured computations for Internet-based computing

    Publication Year: 2004, Page(s):1176 - 1186
    Cited by:  Papers (26)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (456 KB) | HTML iconHTML

    Advances in technology have rendered the Internet a viable medium for employing multiple independent computers collaboratively in the solution of a single computational problem. A variety of mechanisms - e.g., Web-based computing, peer-to-peer computing, and grid computing - have been developed for such Internet-based computing (IC). Scheduling a computation for IC presents challenges that were no... View full abstract»

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  • Supervisory control of software systems

    Publication Year: 2004, Page(s):1187 - 1199
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1104 KB) | HTML iconHTML

    We present a new paradigm to control software systems based on the supervisory control theory (SCT). Our method uses the SCT to model the execution of a software application by restricting the actions of the OS with little or no modifications in the underlying OS. Our approach can be generalized to any software application as the interactions of the application with the OS are modeled at a process... View full abstract»

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  • Cutting metastability using aperture transformation

    Publication Year: 2004, Page(s):1200 - 1204
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB) | HTML iconHTML

    Aperture transformation reduces metastability by trading unsafe edge arrival times with control signal metastability. We improve this further by providing 1) a new runt-free Schmitt trigger-based hardening technique using a controlled clock signal and 2) a new detection/compensation technique that overwrites controlled-clock metastability using set&clear controls. View full abstract»

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  • Pipelining sequential circuits with wave steering

    Publication Year: 2004, Page(s):1205 - 1210
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (916 KB) | HTML iconHTML

    We address the problem of designing very high-throughput finite-state machines (FSMs). The presence of loops in sequential circuits prevents a straightforward application of pipelining to increase performance. We observe that appropriate extensions of the "wave steering" technique can partially overcome the problem. We find that FSM decomposition theory is useful for decoupling the state-variable ... View full abstract»

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  • Fast parallel-prefix modulo 2n+1 adders

    Publication Year: 2004, Page(s):1211 - 1216
    Cited by:  Papers (46)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (592 KB) | HTML iconHTML

    Modulo 2n+1 adders find great applicability in several applications including RNS implementations and cryptography. In this paper, we present two novel architectures for designing modulo 2n+1 adders, based on parallel-prefix carry computation units, the first architecture utilizes a fast carry increment stage, whereas the second is a totally parallel-prefix solution. CMOS imp... View full abstract»

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  • TC Information for authors

    Publication Year: 2004, Page(s): c3
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  • [Back cover]

    Publication Year: 2004, Page(s): c4
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org