By Topic

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Issue 4 • Date October 1982

Filter Results

Displaying Results 1 - 9 of 9
  • A Description of MOS Internodal Capacitances for Transient Simulations

    Publication Year: 1982, Page(s):150 - 156
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1016 KB)

    Charge versus voltage and internodal capacitance versus voltage characteristics are calculated for a short-channel MOSFET using a unified model of the dc device behavior. Velocity saturation is an important feature in the results. The importance of charge and capacitance calculations is assessed using a high speed MOS transient simulation. Device current and gate charge are determined to be the im... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Modeling Latch-Up in CMOS Integrated Circuits

    Publication Year: 1982, Page(s):157 - 162
    Cited by:  Papers (23)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (968 KB)

    Latch-up is a common problem in CMOS integrated circuits. The modeling of latch-up with circuit simulation programs is addressed in this paper. The general features of a lumped element latch-up model are discussed along with a step-by-step approach to the component determination of the model. An example is presented to show the value of the latch-up model in latch-up threshold prediction. Finally,... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Optimized Extraction of MOS Model Parameters

    Publication Year: 1982, Page(s):163 - 168
    Cited by:  Papers (39)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (888 KB)

    A common problem faced by designers in simulating MOS circuits is the specification of model parameters. Typical parameter extraction procedures determine parameters sequentially, ignoring many of the interactions between parameters. The resulting fit of the model to measured data may be less than optimum. Furthermore, the usual extraction procedures are specialized to a particular model; consider... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • SPICE Modeling for Small Geometry MOSFET Circuits

    Publication Year: 1982, Page(s):169 - 182
    Cited by:  Papers (46)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1912 KB)

    VLSI circuit simulation requires computationally efficient MOSFET models. In this paper, VLSI circuit simulator models for the active device and some important passive devices are described. A quasi-physical short channel MOSFET current model is derived. This current model contains both above-threshold and subthreshold components. The values of the model parameter are extracted automatically from ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Substrate Current Modeling for Circuit Simulation

    Publication Year: 1982, Page(s):183 - 186
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (536 KB)

    A new circuit simulation model is presented for impact ionization generated MOSFET substrate current. The model uses four parameters to accurately model substrate current over a wide range of device dimensions and operating voltages, including operation in the linear region. The model is able to model substrate currents from both heavily doped and lightly doped devices. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Circuit Pack Parameter Estimation Using Rent's Rule

    Publication Year: 1982, Page(s):186 - 192
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (808 KB)

    This paper applies an empirically determined relationship known as Rent's rule to the estimation of circuit pack parameters. In particular, equations are derived for 1) the number of leads passing through a region of a circuit pack based on the position of the region, and 2) the total lead length on a circuit pack. The estimation of these parameters is central to the modeling of circuit size and p... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Exploitation of Hierarchy in Analyses of Integrated Circuit Artwork

    Publication Year: 1982, Page(s):192 - 200
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1288 KB)

    The artwork of integrated circuit designs is usually available in the form of hierarchical specification, in which each cell is made up of geometric primitives and references to other cells. Such a representation captures structure and repetition in the layout. As the realizable device count of integrated circuits increases with every passing year there is an increasing trend towards structured de... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Synthesis of Hardware for the Control of Digital Systems

    Publication Year: 1982, Page(s):201 - 212
    Cited by:  Papers (26)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1944 KB)

    This paper focuses on automatic synthesis of digital hardware from a behavioral description. Algorithms have been written and tested to perform automatic generation of control hardware and optimized microcode for specified data paths. The optimization algorithms produce a family of results based on cost and speed constraints supplied by the user. The algorithms adapt to these constraints and adjus... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • WATPC: A Computer-Aided Design Package for Digital Bipolar Integrated Circuits

    Publication Year: 1982, Page(s):213 - 219
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (864 KB)

    Recent advances in integrated circuit technology have involved process development, device, and circuit optimization under scaled design rules. It is advantageous to be able to simulate the overall circuit performance under different conditions. A simulator which performs this task at the logic gate level becomes important. This paper describes such a simulator for digital bipolar integrated circu... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.

Aims & Scope

The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief

VIJAYKRISHNAN NARAYANAN
Pennsylvania State University
Dept. of Computer Science. and Engineering
354D IST Building
University Park, PA 16802, USA
vijay@cse.psu.edu