Issue 3 • Date March 2004
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Table of contents
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PDF (36 KB)
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information
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PDF (37 KB)
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Edge separability-based circuit clustering with application to multilevel circuit partitioning
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PDF (616 KB)
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UTACO: a unified timing and congestion optimization algorithm for standard cell global routing
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PDF (312 KB)
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The effects of unsymmetric matrix permutations and scalings in semiconductor device and circuit simulation
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PDF (536 KB)
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2004 IEEE Asia-Pacific Conference on Circuits and Systems
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PDF (156 KB)
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IEEE Circuits and Systems Society Information
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PDF (34 KB)
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Information for authors
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PDF (23 KB)
Aims & Scope
Contains articles on methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities.
Meet Our Editors
Editor-in-Chief
Sachin Sapatnekar
University of Minnesota
Dept. of Electrical and Computer Engineering
4-174 Keller Hall, 200 Union Street SE
Minneapolis, MN 55455 55455 USA
sachin@umn.edu


