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Computers and Digital Techniques, IEE Proceedings -

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Computers and Digital Techniques, IEE Proceedings -

Issue 1 • Date 15 Jan. 2004

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Title History

Formal verification of a SONET data stream processor

Testing of stuck-open faults in generalised Reed-Muller and EXOR sum-of-products CMOS circuits

dMT: inexpensive throughput enhancement in small-scale embedded microprocessors with differential multithreading

Architectural probing: a new paradigm for enabling communication refinement in SOC design

Energy-efficient Java execution using local memory and object co-location

Data-adaptive motion estimation algorithm and VLSI architecture design for low-power video systems

Low-power system-on-chip architecture for wireless LANs

Simultaneous routing and buffering in SOC floorplan design

Finite state machine state assignment targeting low power consumption

Editorial [Welcome to Volume 151, Issue 1, of IEE Proceedings Computers & Digital Techniques (CDT)]

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