IEEE Transactions on Computers

Issue 4 • April 2004

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Displaying Results 1 - 15 of 15
  • A cost-effective pipelined divider with a small lookup table

    Publication Year: 2004, Page(s):489 - 495
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (462 KB) | HTML iconHTML

    Current pipelinable dividers require very large lookup tables. We propose a cost-effective pipelinable divider that uses a modified Taylor-series expansion and has a smaller lookup table than other pipelinable dividers. The proposed divider requires about 27 percent less area than the pipelinable divider based on normal Taylor-series expansion in single precision. View full abstract»

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  • A fault-tolerant rearrangeable permutation network

    Publication Year: 2004, Page(s):414 - 426
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (784 KB) | HTML iconHTML

    As optical communication becomes a promising networking choice, the well-known Clos network has regained much attention recently from optical switch designers/manufacturers and cluster computing community. There has been much work on the Clos network in the literature due to its uses as optical crossconnects (OXCs) in optical networks and high-speed interconnects in parallel/distributed computing ... View full abstract»

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  • VLSI implementation for one-dimensional multilevel lifting-based wavelet transform

    Publication Year: 2004, Page(s):386 - 398
    Cited by:  Papers (32)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2464 KB) | HTML iconHTML

    The lifting scheme has been developed as a flexible tool suitable for constructing biorthogonal wavelets recently. We present an efficient VLSI architecture for the implementation of 1D lifting discrete wavelet transform. The architecture folds the computations of all resolution levels into the same low-pass and high-pass units to achieve higher hardware utilization. Because of its modular, regula... View full abstract»

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  • A new approach to fault-tolerant wormhole routing for mesh-connected parallel computers

    Publication Year: 2004, Page(s):427 - 438
    Cited by:  Papers (37)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1247 KB) | HTML iconHTML

    A new method for fault-tolerant wormhole routing in arbitrary dimensional meshes is introduced. The method was motivated by certain routing requirements of an initial design of the Blue Gene supercomputer at IBM Research. The machine is organized as a three-dimensional mesh containing many thousands of nodes and the routing method should tolerate a few percent of the nodes being faulty. There has ... View full abstract»

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  • A simple mechanism for detecting ineffectual instructions in slipstream processors

    Publication Year: 2004, Page(s):399 - 413
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1452 KB) | HTML iconHTML

    A slipstream processor accelerates a program by speculatively removing repeatedly ineffectual instructions. Detecting the roots of ineffectual computation: unreferenced writes, nonmodifying writes, and correctly predicted branches, is straightforward. On the other hand, detecting ineffectual instructions in the backward slices of these root instructions currently requires complex back-propagation ... View full abstract»

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  • Multiaccess memory system for attached SIMD computer

    Publication Year: 2004, Page(s):439 - 452
    Cited by:  Papers (12)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1700 KB) | HTML iconHTML

    In order to reduce the memory access time for a Single-Instruction Multiple-Data stream (SIMD) computer with pq processing elements attached to a host computer, a multiaccess memory system is proposed. The proposed memory system supports simultaneous access to pq data elements within a 4-directional block (p × q), a row (1 × pq), a column (pq × 1), a forward-diagonal, and a backw... View full abstract»

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  • The information structure of indulgent consensus

    Publication Year: 2004, Page(s):453 - 466
    Cited by:  Papers (50)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (434 KB) | HTML iconHTML

    To solve consensus, distributed systems have to be equipped with oracles such as a failure detector, a leader capability, or a random number generator. For each oracle, various consensus algorithms have been devised. Some of these algorithms are indulgent toward their oracle in the sense that they never violate consensus safety, no matter how the underlying oracle behaves. We present a simple and ... View full abstract»

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  • A class of code compression schemes for reducing power consumption in embedded microprocessor systems

    Publication Year: 2004, Page(s):467 - 482
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2715 KB) | HTML iconHTML

    Compression of executable code in embedded microprocessor systems, used in the past mainly to reduce the memory footprint of embedded software, is gaining interest for the potential reduction in memory bus traffic and power consumption. We propose three new schemes for code compression, based on the concepts of static (using the static representation of the executable) and dynamic (using program e... View full abstract»

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  • IEEE Transactions on Computers - Table of Content

    Publication Year: 2004, Page(s): 0_1
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    Freely Available from IEEE
  • IEEE Computer Society's - Staff List

    Publication Year: 2004, Page(s): 0_2
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    Freely Available from IEEE
  • Editor's note

    Publication Year: 2004, Page(s): 385
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    Freely Available from IEEE
  • Addendum to "Voltage-clock-scaling adaptive scheduling techniques for low power in hard real-time systems"

    Publication Year: 2004, Page(s): 497
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (166 KB) | HTML iconHTML

    First Page of the Article
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  • TC: Information for authors

    Publication Year: 2004, Page(s): 498
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    Freely Available from IEEE
  • IEEE Computer Society Information

    Publication Year: 2004, Page(s): 499
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    Freely Available from IEEE
  • A geometric theorem for network design

    Publication Year: 2004, Page(s):483 - 489
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (831 KB) | HTML iconHTML

    Consider an infinite square grid G. How many discs of given radius r, centered at the vertices of G, are required, in the worst case, to completely cover an arbitrary disc of radius r placed on the plane? We show that this number is an integer in the set {3,4,5,6} whose value depends on the ratio of r to the grid spacing. One application of this result is to design facility location algorithms wit... View full abstract»

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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org