By Topic

Circuits and Systems II: Express Briefs, IEEE Transactions on

Issue 2 • Date Feb. 2004

Filter Results

Displaying Results 1 - 15 of 15
  • Table of contents

    Page(s): c1
    Save to Project icon | Request Permissions | PDF file iconPDF (33 KB)  
    Freely Available from IEEE
  • IEEE Transactions on Circuits and Systems—II: Express Briefs publication information

    Page(s): c2
    Save to Project icon | Request Permissions | PDF file iconPDF (35 KB)  
    Freely Available from IEEE
  • A six-phase multilevel inverter for MEMS electrostatic induction micromotors

    Page(s): 49 - 56
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (584 KB) |  | HTML iconHTML  

    The construction of miniaturized rotating electric machines through microfabrication techniques is becoming a reality. Applications of such micromotors include miniaturized pumps, compressors, fans, coolers, and turbogenerators. However, the characteristics of these devices make the design of power electronics for them challenging. These characteristics include high-voltage and high frequency operation, tightly constrained operating waveforms and timing, and capacitive input impedances. This paper explores the design of power electronics for microfabricated electrostatic induction machines. We describe the structure and operation of these machines, and establish the operating requirements of power converters for them. We provide a comparison of inverter topologies for this application, and propose an appropriate architecture. The design and experimental evaluation of a prototype six-phase, five-level inverter for this application is presented. The inverter operates at frequencies up to 2 MHz and at voltages up to 300 V, and meets the stringent waveform and timing constraints posed by this application. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Fast convergent pipelined adaptive DFE architecture using post-cursor processing filter technique

    Page(s): 57 - 60
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (208 KB) |  | HTML iconHTML  

    Among existing works of high-speed pipelined adaptive decision feedback equalizers (ADFE), the pipelined ADFE using relaxed look-ahead technique results in a substantial hardware saving than the parallel processing or other look-ahead approaches. For example, Shanbhag and Partiz derived three pipeline ADFE structures (PIPEADFE1, 2, 3), where PIPEADFE2 yields very good performance in terms of convergence rate and hardware cost. Nevertheless, the PIPEADFE2 employs Approximation Methods in deriving the Preprocessing Unit (PP). In this paper, a new pipelining ADFE architecture is developed. We derive a new updating ADFE scheme based on the Principle of Orthogonality. By employing the postcursor processing filter (PCF) to cancel the most significant postcursor Intersymbol interference (ISI) terms, the proposed PCFADFE architecture can significantly improve the convergence rate of the ADFE. Compared with PIPEADFE2, it has better convergence rate while at similar hardware cost. Hence, it provides an alternative approach for the design of high-speed pipelining ADFE with arbitrary speedup factor. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A novel image rejection architecture for quadrature radio receivers

    Page(s): 61 - 68
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (312 KB) |  | HTML iconHTML  

    In radio communications, a bandpass-to-lowpass transformation is needed to demodulate the received signal down to baseband. One crucial question in this context is how to effectively attenuate the image band signal. For this purpose, inphase/quadrature (I/Q) signal processing is widely utilized in today's radio receivers. In this paper, a novel structure for obtaining an image-free baseband observation of the received bandpass signal is presented. The starting point is to approximate the needed 90° phase difference between the I and Q branch signals using a simple time delay of one quarter of the carrier cycle. For narrowband signals, this approach can be used directly to attenuate the inherent "self-image". By using an interference canceller-type of compensation technique, this concept is here generalized to cover also wideband multichannel signals. Furthermore, a closed-form expression to explicitly characterize the obtainable image attenuation is derived. Efficient implementation structures for digital radios utilizing periodically nonuniform subsampling are presented, and the validity of the proposed approach is further illustrated through simulation and design examples. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • CMOS active-LC bandpass filters with coupled-inductor Q-enhancement and center frequency tuning

    Page(s): 69 - 76
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (384 KB)  

    A novel CMOS circuit for obtaining a bandpass response from a triple-coupled-inductor arrangement is presented, featuring Q-enhancement and center frequency tuning by means of vector-modulating a current flowing through one of the coupled inductors. A 0.35-μm CMOS LC filter prototype employing the technique has been fabricated and exhibits a center frequency tuning range of 11% around 1 GHz and Q values up to 180. The input 1-dB compression point is -13 dBm with Q set to 20 and a power consumption of 12.2 mW. Additionally, an input impedance matching scheme around a spiral transformer is presented, which tracks the center frequency of the filter. The active-LC approach can be applied to higher order filter responses and find applications in tunable building blocks for agile RF front ends and multistandard radios. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Exploiting the high-frequency performance of low-voltage low-power SC filters

    Page(s): 77 - 84
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (488 KB)  

    This paper investigates the design of low-voltage low-power switched-capacitor (SC) filters for high-frequency applications by using the clock-booster approach. In particular, our proposed SC filter architecture uses single-ended double-sampling integrator cells based on low-voltage operational transconductance amplifiers which take advantage of dynamic biasing and the clock-booster technique to drive the switch transistors. To validate its high-frequency capability, two low-pass elliptic SC filters respectively with a corner frequency of 6 and 8-MHz, were designed in a 0.35-μm CMOS process. Both are suitable for telecom applications and can operate with a power supply as low as 1.5 V, while dissipating 11 mW. Measurements showed that for an output amplitude of 1 Vpp, their total harmonic distortions were maintained well below -40 dB in their bandwidths. Comparisons with other SC filter implementations in the literature, which highlight the quality of our implementation are also provided. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • RF CMOS low-phase-noise LC oscillator through memory reduction tail transistor

    Page(s): 85 - 90
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (232 KB)  

    Based on the understanding of flicker noise generation in "silicon metal-oxide semiconductor field-effect transistors" (MOSFETs), a novel method for improving the phase noise performance of a CMOS LC oscillator is presented. Zhou et al. and Hoogee have suggested that the 1/f noise can be reduced through a switched gate, and the flicker noise generated is inversely proportional to the gate switching frequency. The novel tail transistor topology is compared to the two popular tail transistor topologies, namely, the fixed biasing tail transistor and without tail transistor. Through this technique, a figure of merit of 193 dB is achieved using a fully integrated CMOS oscillator with a tank quality factor of about 9. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Parametric adaptive control of multimachine power systems with nonlinear loads

    Page(s): 91 - 100
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (320 KB) |  | HTML iconHTML  

    The novel concepts and definitions of M derivative and M bracket for nonlinear differential algebraic system (NDAS) are introduced, and some related revised results that are similar to the classic differential geometric theory are given. The normal forms of NDAS model are obtained by multi-input multi-output (MIMO) feedback linearization technique. The control expressions derived are based on the linear system theory and the requirements of tracking targets when the relative degree of the system is less than the dimension of the system and the special designated conditions are satisfied. The parametric adaptive controller is obtained for the multimachine power systems with nonlinear loads and undetermined or unknown parameters by the Lyapunov stability theory and method. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • IEEE International Symposium on Circuits and Systems (ISCAS2004)

    Page(s): 101
    Save to Project icon | Request Permissions | PDF file iconPDF (527 KB)  
    Freely Available from IEEE
  • ICECS 2004

    Page(s): 102
    Save to Project icon | Request Permissions | PDF file iconPDF (495 KB)  
    Freely Available from IEEE
  • 2004 IEEE Asia-Pacific Conference on Circuits and Systems

    Page(s): 103
    Save to Project icon | Request Permissions | PDF file iconPDF (156 KB)  
    Freely Available from IEEE
  • IEEE Member Digital Library [advertisement]

    Page(s): 104
    Save to Project icon | Request Permissions | PDF file iconPDF (179 KB)  
    Freely Available from IEEE
  • IEEE Circuits and Systems Society Information

    Page(s): c3
    Save to Project icon | Request Permissions | PDF file iconPDF (34 KB)  
    Freely Available from IEEE
  • IEEE Transactions on Circuits and Systems—II: Express Briefs Information for authors

    Page(s): c4
    Save to Project icon | Request Permissions | PDF file iconPDF (35 KB)  
    Freely Available from IEEE

Aims & Scope

TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:

  • Circuits: Analog, Digital and Mixed Signal Circuits and Systems  
  • Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
  • Circuits and Systems, Power Electronics and Systems
  • Software for Analog-and-Logic Circuits and Systems
  • Control aspects of Circuits and Systems. 

Full Aims & Scope