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IEEE Transactions on Semiconductor Manufacturing

Issue 1 • Date Feb. 2004

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Displaying Results 1 - 15 of 15
  • Table of contents

    Publication Year: 2004, Page(s): 01
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  • IEEE Transactions on Semiconductor Manufacturing publication information

    Publication Year: 2004, Page(s): 0_2
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  • Changes in the Editorial Board

    Publication Year: 2004, Page(s): 1
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  • Characterization of spatial intrafield gate CD variability, its impact on circuit performance, and spatial mask-level correction

    Publication Year: 2004, Page(s):2 - 11
    Cited by:  Papers (48)  |  Patents (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (552 KB) | HTML iconHTML

    The authors present a comprehensive characterization method applied to the study of the state-of-the-art 18-μm CMOS process. Statistical characterization of gate CD reveals a large spatial intrafield component, strongly dependent on the local layout patterns. The authors describe the statistical analysis of this data and demonstrate the need for such comprehensive characterization. They describ... View full abstract»

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  • Extrusion spin coating: an efficient and deterministic photoresist coating method in microlithography

    Publication Year: 2004, Page(s):12 - 21
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (568 KB) | HTML iconHTML

    Extrusion spin coating was developed to reduce photoresist waste and to improve coating uniformity in microlithography. This new method uses an efficient extrusion coating technique to apply a thin film of resist to a wafer prior to spinning. This initial layer of photoresist eliminates the spreading phase, the most inefficient step in conventional spin coating. The initial layer also provides exi... View full abstract»

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  • Time minimization for a three-step cyclic process of deposition and diffusion

    Publication Year: 2004, Page(s):22 - 24
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (128 KB) | HTML iconHTML

    The optimal layer thickness for minimizing the total time to build a layer with a three-step cyclic process of deposition and diffusion, or "annealing," is determined. Deposition and diffusion processes scale rather differently according to time. This analysis, for the building of a TiN barrier layer, quantifies those times in a model and is then used to find the thickness that minimizes a total t... View full abstract»

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  • Noncontact critical dimension metrology sensor for chrome photomasks featuring a low-temperature co-fired ceramic technology

    Publication Year: 2004, Page(s):25 - 34
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1040 KB) | HTML iconHTML

    This paper describes a noncontact capacitive-sensor metrology sensor developed to measure minimum feature sizes, also called critical dimensions, patterned on photomasks that are used in semiconductor device manufacture. Additionally, this paper describes the test structures printed on photomasks that facilitate linewidth metrology with the new sensor. The metrology sensor is fabricated using a lo... View full abstract»

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  • Sensitive strain measurements of bonded SOI films using Moire´

    Publication Year: 2004, Page(s):35 - 41
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (656 KB) | HTML iconHTML

    The authors have developed a simple technique to quantify strain in bonded Si films and used it to compare the strain induced by two distinct wafer bonding methods. This method consists of patterning sets of moire´ gratings on silicon-on-insulator (SOI) substrates prior to bonding using a G-line stepper. After planarization, bonding, and etch-back, the same lithography step is performed on t... View full abstract»

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  • Deadlock-free scheduling of photolithography equipment in semiconductor fabrication

    Publication Year: 2004, Page(s):42 - 54
    Cited by:  Papers (30)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (768 KB) | HTML iconHTML

    This paper presents the development of an efficient approach to the deadlock-free scheduling of photolithography equipment in semiconductor fabrication. Trends toward high automation and flexibility in the photolithography equipment accelerate the necessity of an intelligent scheduler that can guarantee reliability and improve the productivity of the photolithography equipment. Therefore, the sche... View full abstract»

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  • Scrapping small lots in a low-yield and high-price scenario

    Publication Year: 2004, Page(s):55 - 67
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB) | HTML iconHTML

    Some wafers in a lot may become spoiled after they are processed at a workstation; such a lot is called a small lot. In a low yield and high price scenario, scrapping small lots may increase revenue and profit; yet, this notion has seldom been examined. This study presents a model for formulating the decision-making problem of scrapping small lots. A genetic algorithm is used to solve the problem ... View full abstract»

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  • An optimal residency-aware scheduling technique for cluster tools with buffer module

    Publication Year: 2004, Page(s):68 - 73
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (256 KB) | HTML iconHTML

    Cluster tools provide a flexible, reconfigurable, and efficient environment for several manufacturing processes (e.g., semiconductor manufacturing). A new timing constraint (distinct from a simple deadline), referred to as residency constraint, puts a timing limit on the time that a wafer can stay in a processing module in a cluster tool. The authors demonstrate that a solution that does not addre... View full abstract»

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  • 2004 IEEE Compound Semiconductor IC Symposium call for papers

    Publication Year: 2004, Page(s): 74
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  • IEEE copyright form

    Publication Year: 2004, Page(s):75 - 76
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  • IEEE Transactions on Semiconductor Manufacturing information for authors

    Publication Year: 2004, Page(s): c3
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  • [Breaker page]

    Publication Year: 2004, Page(s): c4
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Aims & Scope

The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components.

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Meet Our Editors

Editor-in-Chief

Anthony Muscat
Department of Chemical and Environmental Engineering
Harshbarger Bldg., Room 134
1133 E. James Rogers Way
University of Arizona
Tucson, AZ  85721