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Semiconductor Manufacturing, IEEE Transactions on

Issue 4 • Date Nov. 2003

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Displaying Results 1 - 18 of 18
  • 2002 best paper award

    Page(s): 573 - 574
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    Freely Available from IEEE
  • Author Index

    Page(s): 712 - 716
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    Freely Available from IEEE
  • Subject index

    Page(s): 716 - 727
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    Freely Available from IEEE
  • Adaptive control approach of rapid thermal processing

    Page(s): 621 - 632
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (650 KB) |  | HTML iconHTML  

    This paper presents an adaptive control approach for achieving the control of the wafer temperature in a rapid thermal processing system (RTP). Numerous studies have addressed the temperature control problem in RTP and most researches on this problem require exact knowledge of the systems dynamics. However, it is difficult to acquire this exact knowledge. Thus, various approaches cannot guarantee the desired performance in practical application when there exist some modeling errors between the model and the actual system. In this paper, an adaptive control scheme is applied to RTP without exact information on the dynamics. The system dynamics are assumed to be an affine nonlinear form, and the unknown portion of the dynamics are estimated by a neural network referred to a piecewise linear approximation network (PLAN). The controller architecture is based on an adaptive feedback linearization scheme and augmented by sliding mode control. The performance of the proposed method is demonstrated by experimental results on an RTP system of Kornic Systems Corporation, Korea. View full abstract»

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  • Reliability improvement of rapid thermal oxide using gas switching

    Page(s): 656 - 659
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (310 KB) |  | HTML iconHTML  

    The instantaneous switch-off of the gas precursors during the ramp-down cycle in a spike ramp process is demonstrated to be an effective method to enhance the reliability of rapid thermal oxide. Due to the slow ramp-down rate (60°C-90°C/s) of a rapid thermal process, the oxidation during the slow ramp-down cycle may produce the inferior oxide, especially for ultrathin oxide. To avoid the oxidation in the slow ramp-down cycle, the oxidation precursor (oxygen) is switched off during the ramp-down cycle. The reliability of resulting oxide without oxidation during the ramp-down cycle is enhanced as compared with the conventional oxide, which is still oxidized during the ramp-down cycle. View full abstract»

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  • A study of variable EWMA controller

    Page(s): 633 - 643
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    The exponentially weighted moving average (EWMA) feedback controller (with a fixed discount factor) is a popular run by run control scheme which primarily uses data from past process runs to adjust settings for the next run. Although the EWMA controller with a small discount factor can guarantee a long-term stability (under fairly regular conditions), it usually requires a moderately large number of runs to bring the output of a process to its target. This is impractical for process with small batches. The reason is that the output deviations are usually very large at the beginning of the first few runs and, as a result, the output may be out of process specifications. In order to reduce a possibly high rework rate, the authors propose a variable discount factor to tackle the problem. They state the main results in which the stability conditions and the optimal variable discount factor of the proposed EWMA controller are derived. An example is given to demonstrate the performance. Moreover, a heuristic is proposed to simplify the computation of the variable discount factor. It is seen that the proposed method is easy to implement and provides a good approximation to the optimal variable discount factor. View full abstract»

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  • Experimental study of airflow and particle characteristics of a 300-mm POUP/LPU minienvironment system

    Page(s): 660 - 667
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    This study examines the airflow and particle characteristics of a front opening unified pod/load port unit (FOUP/LPU) minienvironment system. The airflow and particle number were measured by using a three-dimensional ultrasonic anemometer and an He-Ne laser airborne particle counter, respectively. A large vortex is produced below an extracted wafer in the minienvironment. This vortex extends to the lower part of the minienvironment and reaches the door opener of the LPU. Particles produced on the moving parts of the LPU were carried to the back surface of the wafer, which were at the lowest position (the first wafer). How the open ratio of the perforated plate of the minienvironment affects the pressure difference between the minienvironment and surrounding environment and the airflow through the minienvironment was determined. The thoroughly elucidated information is useful for mitigating contamination when planning a fabrication line and designing a production tool. View full abstract»

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  • Neural network modeling of reactive ion etching using optical emission spectroscopy data

    Page(s): 598 - 608
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    Neural networks are employed to model reactive ion etching (RIE) using optical emission spectroscopy (OES) data. While OES is an excellent tool for monitoring plasma emission intensity, a primary issue with its use is the large dimensionality of the spectroscopic data. To alleviate this concern, principal component analysis (PCA) and autoencoder neural networks (AENNs) are implemented as mechanisms for feature extraction to reduce the dimensionality of the OES data. OES data are generated from a 24 factorial experiment designed to characterize RIE process variation during the etching of benzocyclobutene (BCB) in a SF6/O2 plasma, with controllable input factors consisting of the two gas flows, RF power, and chamber pressure. The OES data, consisting of 226 wavelengths sampled every 20 s, are compressed into five principal components using PCA and seven features using AENNs. Each method is subsequently used to establish multilayer perceptron neural networks trained using error back-propagation to model etch rate, uniformity, selectivity, and anisotropy. The neural network models of the etch responses using both methods show excellent agreement, with root-mean-squared errors as low as 0.215% between model predictions and measured data. View full abstract»

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  • Methodology for feedback variable selection for control of semiconductor manufacturing processes - Part 1: Analytical and simulation results

    Page(s): 575 - 587
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    As integrated circuit feature size continues to shrink, yield loss due to parametric variation will become more and more significant. Real-time feedback control provides a means of reducing parametric variation and therefore limiting this type of yield loss. A challenge in applying feedback control to semiconductor manufacturing processes is selecting the variables to feed back. In many manufacturing processes, the important product variables cannot be measured in real-time and therefore cannot be directly controlled using real-time feedback control. An alternative, which has proven effective, is to feed back process variables closely related to the product variables. Typically, selection of process variables to feed back is based upon qualitative knowledge about the process, which in many cases is limited. In this paper, an empirical methodology for selecting the best process variables for feedback in order to minimize variation in the product variables is presented. Two versions of this methodology are described, a full version and a "lite" version. The latter is an abridged version of the former. Prior to introducing this methodology, a condition under which real-time feedback control will reduce product variable variation is derived. This condition is used to highlight the sources of variance in the product variables, information which is used to explain how the methodology works. The methodology is evaluated using simulated experiments. Both the full and lite versions prove to be effective under the assumptions stated for this study although the full version is clearly superior in terms of performance. Application of the methodology to a reactive ion etch process is described in a companion work. View full abstract»

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  • Mechanical stress control in a VLSI-fabrication process: a method for obtaining the relation between stress levels and stress-induced failures

    Page(s): 696 - 703
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (632 KB) |  | HTML iconHTML  

    An ideal fabrication process is designed to minimize mechanical stress in semiconductor devices and to improve device reliability. Mechanical stress levels were predicted by in-house simulations supported by a thin-film database. These stress levels were correlated with stress-induced defects by TEM analysis supported by fail bit addressing on matured megabit SRAMs. Amorphous-doped silicon film with various annealing temperatures were used for the gate electrode to change the mechanical stress in devices and to get the direct relationship between predicted stress levels and stress related defects. The authors describe brief guidelines for suppressing dislocations in the small geometry shallow-trench isolation process utilizing this system. Polysilicon thickness in the W-polycide gate electrode is designed to minimize mechanical stress in the gate oxide and to suppress the gate oxide failure in probe and class tests. Moreover, critical stress generates dislocations during post source/drain ion implantation anneal obtained by a ball indentation method. This indicated that lower temperature anneal is effective in suppressing the dislocations. A two-step anneal was introduced to suppress dislocations and to enable higher ion activation. View full abstract»

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  • Electrical characterization of the copper CMP process and derivation of metal layout rules

    Page(s): 668 - 676
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (684 KB) |  | HTML iconHTML  

    Design rules were developed for the layout of copper Damascene interconnect layers to minimize the within-die resistance variation. The impact of various layout configurations on the metal sheet resistance was characterized using two different test vehicles. An increase in resistance was observed on wide lines and high pattern densities due to dishing and dielectric erosion, respectively. In addition to the above, narrow lines were severely impacted by the presence of wide adjacent features in close proximity. The pattern interaction distance for copper chemical-mechanical planarization (CMP) was calculated by analyzing the resistance variation at the edge of a density or width transition. In this work, the interaction distance was found to be on the order of 25 μm (as opposed to a few millimeters for oxide CMP). From these results, a window of about 50 to 60 μm was found to be necessary to obtain the effective pattern density for copper CMP. The resistance of the upper metal level was a strong function of the underlying layer density. Hence, multilevel pattern dependencies have to be considered when modeling and predicting the line resistance on a real design. However, unlike oxide polish, pattern density alone is insufficient to predict the final copper thickness. Width-dependent spacing rules are necessary to prevent clustering of features (narrow lines very close to wide buses) and avoid regions of very low density. View full abstract»

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  • On the use of decision tree induction for discovery of interactions in a photolithographic process

    Page(s): 644 - 652
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (355 KB) |  | HTML iconHTML  

    This paper delineates a comprehensive and successful application of decision tree induction to 1054 records of production lots taken from a lithographic process with 45 processing steps. Complex interaction effects among manufacturing equipment that lead to increased product variability have been detected. The extracted information has been confirmed by the process engineers, and used to improve the lithographic process. The paper suggests that decision tree induction may be particularly useful when data is multidimensional, and the various process parameters and machinery exhibit highly complex interactions. Another implication is that on-line monitoring of the manufacturing process (e.g., closed-loop critical dimensions control) using data mining may be highly effective. View full abstract»

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  • Wavelet-based identification of delamination defect in CMP (Cu-low k) using nonstationary acoustic emission signal

    Page(s): 677 - 685
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (677 KB) |  | HTML iconHTML  

    Wavelet-based multiscale analysis approaches have revolutionized the tasks of signal processing, such as image and data compression. However, the scope of wavelet-based methods in the fields of statistical applications, such as process monitoring, density estimation, and defect identification, are still in their early stages of evolution. Recent literature contains some applications of wavelet-based methods in monitoring, such as tool-life monitoring, bearing defect monitoring, and monitoring of ultra-precision processes. This paper presents a novel application of a wavelet-based multiscale method in a nanomachining process [chemical mechanical planarization (CMP)] of wafer fabrication. The application involves identification of delamination defect of low-k dielectric layers by analyzing the nonstationary acoustic emission (AE) signal and coefficient of friction (CoF) signal collected during copper damascene (Cu-low k) CMP process. An offline strategy and a moving window-based strategy for online implementation of the wavelet monitoring approach are developed. Both offline and moving window-based strategies are implemented on the data collected from two different sources. The results show that the wavelet-based approach using the AE signal offers an efficient means for real-time detection of delamination defects in CMP processes. Such an online strategy, in contrast to the existing offline approaches, offers a viable tool for CMP process control. The results also indicate that the CoF signal is insensitive to delamination defect. View full abstract»

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  • Effect of CMOS technology scaling on thermal management during burn-in

    Page(s): 686 - 695
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (630 KB) |  | HTML iconHTML  

    Burn-in is a quality improvement procedure challenged by the high leakage currents that are rapidly increasing with IC technology scaling. These currents are expected to increase even more under the new burn-in environments leading to higher junction temperatures, possible thermal runaway, and yield loss during burn-in. The authors estimate the increase in junction temperature with technology scaling. Their research shows that under normal operating conditions, the junction temperature is increasing 1.45×/generation. The increase in junction temperature under the burn-in condition was found to be exponential. The range of optimal burn-in voltage and temperature is reduced significantly with technology scaling. View full abstract»

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  • Effect of tilt angle variations in a halo implant on Vth values for 0.14-μm CMOS devices

    Page(s): 653 - 655
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    Sensitivity of critical transistor parameters to halo implant tilt angle for 0.14-μm CMOS devices was investigated. Vth sensitivity was found to be 3% per tilt degree. A tilt angle mismatch between two serial ion implanters used in manufacturing was detected by tracking Vth performance for 0.14-μm production lots. Even though individual implanters may be within tool specifications for tilt angle control (±0.5° for our specific tool type), the relative mismatch could be as large as 1°, and therefore, result in a Vth mismatch of over 3% from nominal. The Vth mismatch results are in qualitative agreement with simulation results using SUPREM and MEDICI software. View full abstract»

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  • Methodology for feedback variable selection for control of semiconductor manufacturing processes - Part 2: Application to reactive ion etching

    Page(s): 588 - 597
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (409 KB) |  | HTML iconHTML  

    The PVVM methodology for feedback variable selection introduced in a companion paper (Patterson et al., 2003) is applied to a gate etch process. The primary purpose of this paper is to illustrate the practical aspects of utilizing this methodology. Particular attention is given to the challenging task of process modeling. The model-building procedure and constraint-limited exhaustive search is demonstrated to perform superior to other model-building procedures including principal component regression and partial least squares regression for use in this methodology. A second purpose is to present the results for the etch process. Advanced sensors considered for real-time process control of this process include an RF probe, mass spectroscopy and optical emission spectroscopy. Feedback variables are selected to reduce variation in etch rate, nonuniformity and lateral etch rate. The advantages of treating location on the wafer as a disturbance to the etch rate model so that both etch rate and nonuniformity may be captured in one model are presented and experimentally verified. View full abstract»

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  • Analyzing repair decisions in the site imbalance problem of semiconductor test machines

    Page(s): 704 - 711
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    Test machines can test multiple IC devices simultaneously. When testing the same group of devices, unusual deviations in yield rates of specific sites from the other sites (i.e., site imbalance) imply a fault in the corresponding sites and the machine. This study develops a decision analysis framework for maximizing profit and customer satisfaction under uncertain conditions. The proposed framework can provide the on-site operators specific decision rules to help decide whether they should continue the test, close specific sites, or shut the machine down to repair it. A numerical example is used for illustration. View full abstract»

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  • Neural network based uniformity profile control of linear chemical-mechanical planarization

    Page(s): 609 - 620
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    In this paper, a neural network based uniformity controller is developed for the linear chemical-mechanical planarization (CMP) process. The control law utilizes the metrology measurements of the wafer uniformity profile and tunes the pressures of different air-bearing zones on Lam linear CMP polishers. A feedforward neural network is used to self-learn the CMP process model and a direct inverse control with neural network is utilized to regulate the process to the target. Simulation and experimental results are presented to illustrate the control system performance. Compared with the results by using statistical surface response methods (SRM), the proposed control system can give more accurate uniformity profiles and more flexibility. View full abstract»

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Aims & Scope

The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components.

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Editor-in-Chief

Anthony Muscat
Department of Chemical and Environmental Engineering
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1133 E. James Rogers Way
University of Arizona
Tucson, AZ  85721