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Nanotechnology, IEEE Transactions on

Issue 3 • Date Sept. 2003

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Displaying Results 1 - 10 of 10
  • Simulating quantum transport in nanoscale MOSFETs: ballistic hole transport, subband engineering and boundary conditions

    Publication Year: 2003 , Page(s): 135 - 143
    Cited by:  Papers (13)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (723 KB)  

    We present a modeling scheme for simulating ballistic hole transport in thin-body fully depleted silicon-on-insulator pMOSFETs. The scheme includes all of the quantum effects associated with hole confinement and also accounts for valence band nonparabolicity approximately. This simulator is used to examine the effects of hole quantization on device performance by simulating a thin (1.5-nm) and thick (5-nm) body double-gated pMOSFET in the ballistic limit. Two-dimensional electrostatic effects such as drain-induced barrier lowering (DIBL) and off-equilibrium transport are emphasized as part of this study. The effect of channel orientation on the device performance is examined by simulating pMOSFETs with channels directed along <100> and <110>. Simulated device characteristics for identical nMOSFETs and pMOSFETs are compared in order to explore the effects of subband engineering on CMOS technology. Novel floating boundary conditions used in simulating ballistic transport are highlighted and discussed. View full abstract»

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  • Periodic defects in 2D-PBG materials: full-wave analysis and design

    Publication Year: 2003 , Page(s): 126 - 134
    Cited by:  Papers (5)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (994 KB) |  | HTML iconHTML  

    In this paper, an accurate and efficient characterization of two-dimensional photonic bandgap structures with periodic defects is performed, which exploits a full-wave diffraction theory developed for one-dimensional gratings. The high convergence rate of the proposed technique is demonstrated. Results are presented for both TE and TM polarizations, showing the efficiencies as a function of wavelength, incidence angle, geometrical and physical parameters. A comparison with other theoretical results reported in the literature is shown with a good agreement. The transmission properties of photonic crystals with periodic defects are studied, investigating the effects of the variation of geometrical and physical parameters; design efficiency maps and formulas are given; moreover, the application of the analyzed structures as filters is discussed. View full abstract»

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  • Controlled single-electron effects in nonoverlapped ultra-short silicon field effect transistors

    Publication Year: 2003 , Page(s): 144 - 148
    Cited by:  Papers (14)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (573 KB) |  | HTML iconHTML  

    Low temperature transport measurements in ultra-short silicon field effect transistors with deliberately nonoverlapping gates show periodic Coulomb blockade oscillations. Despite its relatively small charging energy (≈2 meV) this single-electron effect is promising because it is controlled by geometrical confinement between the nonoverlapped extensions acting as tunnel barriers. Remarkably these single electron devices are excellent field effect transistors at room temperature. View full abstract»

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  • A technique for producing ordered arrays of metallic nanoclusters by electroless deposition in focused ion beam patterns

    Publication Year: 2003 , Page(s): 154 - 157
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (572 KB) |  | HTML iconHTML  

    Ordered arrays of Au nanoclusters have been prepared on Si substrates using a combination of focused ion beam (FIB) surface processing and electroless deposition. Particles varying in size from approximately 30 to 100 nm have been produced in regular grid patterns whose geometry is controlled to high precision by the FIB. Potential applications range from engineering of the surface plasmon resonance for numerous optical applications to building structures for tethering organic molecules in specific geometric arrangements. View full abstract»

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  • Electrostatics of coaxial Schottky-barrier nanotube field-effect transistors

    Publication Year: 2003 , Page(s): 175 - 180
    Cited by:  Papers (40)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (419 KB) |  | HTML iconHTML  

    Analytical and numerical methods are used to solve Poisson's equation for carbon nanotube field-effect transistors (FETs) with a cylindrical surrounding gate and Schottky-barrier contacts to the source and drain. The effect on the nanotube potential profile of varying the work functions of all the electrodes, and the thickness and permittivity of the gate dielectric, is investigated. From these results, the general trends to be expected in the above-threshold drain current-voltage characteristics of Schottky-barrier nanotube FETs are predicted. The unusual possibility of simultaneous electron and hole contributions to the drain current is revealed. The subthreshold characteristics are computed from a solution to Laplace's equation, and the subthreshold slope is found to depend on gate dielectric thickness in a different manner from that in other FETs. View full abstract»

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  • Threshold voltage calculation in ultrathin-film SOI MOSFETs using the effective potential

    Publication Year: 2003 , Page(s): 121 - 125
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (426 KB) |  | HTML iconHTML  

    The success of the effective potential method of including quantum confinement effects in simulations of MOSFETs is based on the ability to calculate ahead of time the extent of the Gaussian wave packet used to describe the electron. In the calculation of the Gaussian, the inversion layer is assumed to form in a triangular potential well, from which a suitable standard deviation can be obtained. The situation in an ultrathin silicon-on-insulator (SOI) MOSFET is slightly different, in that the potential well has a triangular bottom, but there is a significant contribution to the confinement from the rectangular barriers formed by the gate oxide and the buried oxide. For this more complex potential well, it is of interest to determine the range of applicability of the effective potential model with a constant standard deviation. In this paper, we include this effective potential model in Monte Carlo calculations of the threshold voltage of ultrathin SOI MOSFETs. We find that the effective potential recovers the expected trend in threshold voltage shift with decreasing silicon thickness, down to a thickness of approximately 3 nm. View full abstract»

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  • Nanocomposite organic films on silicon

    Publication Year: 2003 , Page(s): 149 - 153
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (290 KB) |  | HTML iconHTML  

    Metal-insulator-semiconductor structures were fabricated using 40-layers-thick Langmuir-Blodgett (LB) films of stearic acid (SA) on hydrophobic n-type silicon (n-Si) substrates. Cadmium sulphide (CdS) nanoparticles were introduced by exposure to H2S gas for a period of 12 h. Samples containing CdS nanoparticles exhibit lower dc leakage current but higher effective dielectric constant. The effective dielectric constant of the CdS embedded SA matrix is found to be 5.1. The Poole-Frenkel effect is prevalent for charge transport in the LB films containing CdS nanoparticles at the field higher than 107· Vm-1. The effect becomes saturated at higher fields. View full abstract»

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  • Bipolar conduction and drain-induced barrier thinning in carbon nanotube FETs

    Publication Year: 2003 , Page(s): 181 - 185
    Cited by:  Papers (9)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (395 KB) |  | HTML iconHTML  

    The drain current-voltage (I-V) characteristics of Schottky-barrier carbon nanotube field-effect transistors (FETs) are computed via a self-consistent solution to the two-dimensional potential profile, the electron and hole charges in the nanotube, and the electron and hole currents. These out-of-equilibrium results are obtained by allowing splitting of both the electron and hole quasi-Fermi levels to occur at the source and drain contacts to the tube, respectively. The interesting phenomena of bipolar conduction in a FET, and of drain-induced barrier thinning (DIBT) are observed. These phenomena are shown to add a breakdown-like feature to the drain I-V characteristic. It is also shown that a more traditional, saturating-type characteristic can be obtained by workfunction engineering of the source and drain contacts. View full abstract»

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  • A multinanodot floating-gate MOSFET circuit for spiking neuron models

    Publication Year: 2003 , Page(s): 158 - 164
    Cited by:  Papers (5)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (863 KB) |  | HTML iconHTML  

    Spiking neuron models, which represent information in the form of spatiotemporal patterns in spike pulse trains, have attracted much attention recently in the fields of computational neuroscience and artificial neural networks. The information processing abilities of spiking neuron models have been proven superior to those of the conventional analog-type (rate-coding) neural network models. In particular, the spike response model (SRM), which simplifies the biological neuron operation from the viewpoint of spike response, is important for VLSI implementation and various applications. In the SRM, the generation of post-synaptic potentials (PSPs) is essential. The conventional CMOS devices require complicated circuits in order to realize the function of SRM neurons. In this paper, a new device structure using a MOSFET with multinanodot floating-gate arrays is proposed for the synapse component of SRM neurons. This structure can operate at room temperature, as it utilizes thermal-noise-assisted tunneling between nanodots. The structure generates PSPs by taking advantage of the delay in electron movement due to stochastic tunneling processes. The results of single-electron circuit simulation demonstrate the generation of PSPs. The proposed structure has not yet been fabricated. The aim of this paper is to propose guidelines for the development of new nanoscale devices and fabrication technology for intelligent information processing such as that achieved in the human brain. View full abstract»

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  • Stochastic assembly of sublithographic nanoscale interfaces

    Publication Year: 2003 , Page(s): 165 - 174
    Cited by:  Papers (71)  |  Patents (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1164 KB) |  | HTML iconHTML  

    We describe a technique for addressing individual nanoscale wires with microscale control wires without using lithographic-scale processing to define nanoscale dimensions. Such a scheme is necessary to exploit sublithographic nanoscale storage and computational devices. Our technique uses modulation doping to address individual nanowires and self-assembly to organize them into nanoscale-pitch decoder arrays. We show that if coded nanowires are chosen at random from a sufficiently large population, we can ensure that a large fraction of the selected nanowires have unique addresses. For example, we show that N lines can be uniquely addressed over 99% of the time using no more than 2.2log2(N)+11 address wires. We further show a hybrid decoder scheme that only needs to address N=O(Wlitho-pitch/Wnano-pitch) wires at a time through this stochastic scheme; as a result, the number of unique codes required for the nanowires does not grow with decoder size. We give an O(N2) procedure to discover the addresses which are present. We also demonstrate schemes that tolerate the misalignment of nanowires which can occur during the self-assembly process. View full abstract»

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Aims & Scope

The IEEE Transactions on Nanotechnology is devoted to the publication of manuscripts of archival value in the general area of nanotechnology, which is rapidly emerging as one of the fastest growing and most promising new technological developments for the next generation and beyond.

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Meet Our Editors

Editor-in-Chief
Fabrizio Lombardi
Dept. of ECE
Northeastern Univ.