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IEE Proceedings - Circuits, Devices and Systems

Issue 3 • 6 June 2003

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Displaying Results 1 - 13 of 13
  • Solving the two capacitor paradox through a new asymptotic approach

    Publication Year: 2003, Page(s):227 - 231
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (391 KB)

    Closing an ideal switch between two passive linear lumped time-invariant capacitors with different initial voltages gives rise to an apparent paradox. A part of the total energy stored in the two capacitors suddenly vanishes, but, seemingly, the switch cannot account for this loss. Hence, the energy conservation law appears to be violated. The author reconsiders this circuit, and gives a complete ... View full abstract»

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  • High performance ferroelectric memory with grounded-plate PMOS-gate cell technology

    Publication Year: 2003, Page(s):217 - 226
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (693 KB)

    A new FRAM architecture utilising a grounded-plate PMOS-gate (GPPG) ferroelectric cell is proposed. A GPPG cell consists of a PMOS access transistor and a ferroelectric data storage capacitor. Its plate is grounded. The proposed architecture employs three novel methods for cell operation: a VDD-precharged bit-line, a negative-voltage word-line technique and negative-pulse restoration. B... View full abstract»

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  • Designing robust asynchronous circuit components

    Publication Year: 2003, Page(s):161 - 166
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (445 KB)

    Asynchronous circuits require components that display hazard-free operation under normal input conditions. In addition, quasi-delay-insensitive circuits are based on the assumption of isochronic forks, an assumption that can in practice be compromised by threshold variations due to the use of, for example, dynamic or pseudo-dynamic C-gate circuits. In the paper, the authors investigate the severit... View full abstract»

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  • New model for a GaAs X-ray pixel detector

    Publication Year: 2003, Page(s):210 - 216
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (482 KB)

    The performance of a GaAs semiconductor matrix pixel detector, designed for intrinsic digital radiography, is evaluated. Electrical characterisation of different pixels is realised and a new numerical model is indicated for the charge and the current due to electron/hole pairs generated by the ionising radiation. The model, taking into account trapping and generated carrier phenomena, allows the i... View full abstract»

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  • Algorithmic low power FIR cores

    Publication Year: 2003, Page(s):155 - 160
    Cited by:  Papers (14)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (428 KB)

    The authors present a number of novel architectures for the implementation of low power FIR filtering cores. These architectures are directly translated from flexible algorithms which exploit data and coefficient correlation in order to minimise the effective switched capacitance on the multiplier, and data/coefficient buses. Another characteristic of these algorithms is that they can be combined ... View full abstract»

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  • New digital sweep oscillator structures

    Publication Year: 2003, Page(s):179 - 184
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (415 KB)

    Two new structures for digital sweep oscillators are presented. The first oscillator overcomes the limitations associated with previously reported oscillators. The second proposed oscillator provides the features of the first, while being capable of generating very low sweep-rate signals. The sweep rates produced by this oscillator can be orders of magnitude less than those reported by Hiasat and ... View full abstract»

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  • Low-voltage CMOS current amplifier and its use for high-performance voltage amplification

    Publication Year: 2003, Page(s):205 - 209
    Cited by:  Papers (7)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (415 KB)

    A CMOS current operational amplifier (COA) is exploited to obtain a voltage amplifier operating at 1 V and with an input bias voltage of 0.5 V. The COA employs a class AB input stage that enhances the slew-rate performance and provides accurate control of both the quiescent currents and the input bias voltage. It exhibits a 56 dB loop gain with a gain-bandwidth product of 18 MHz. Based on this COA... View full abstract»

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  • Implementation of low-power FFT processor cores using a novel order-based processing scheme

    Publication Year: 2003, Page(s):149 - 154
    Cited by:  Papers (8)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (452 KB)

    The authors present a novel order-based coefficient processing scheme for the realisation of low-power FFT processors. The scheme is based on the minimisation of the Hamming distance between successive coefficients fed to the butterfly. A distinct feature of the scheme that distinguishes it from conventional order-based schemes lies in the fact that either the real part of the coefficient or its t... View full abstract»

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  • Design and simulation of a single-electron full-adder

    Publication Year: 2003, Page(s):173 - 177
    Cited by:  Papers (7)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (359 KB)

    A single-electron full-adder is presented in which bits of information are represented by the presence or absence of single electrons at conducting islands. The logic operation of the full-adder is verified using simulation, and the stability of its operation is analysed using a Monte Carlo method. View full abstract»

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  • Compact and low power consuming frequency/phase multiplier MMICs for wireless LAN at S-band and C-band

    Publication Year: 2003, Page(s):199 - 204
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (462 KB)

    Active, monolithically integrated S-band (1.1-2.2 GHz) and C-band (2.2-4.4 GHz) frequency/phase doublers with ultra-compact circuit areas of less than 0.6 mm2 and 0.5 mm2, respectively, are presented using a commercial 0.6 μm GaAs MESFET technology. These circuits were designed for low-power-consuming adaptive antenna receivers, operating in accordance with the high-perfor... View full abstract»

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  • Performance analysis and optimisation of NCL self-timed rings

    Publication Year: 2003, Page(s):167 - 172
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (456 KB)

    A self-timed ring using NULL convention logic (NCL) is presented. An analytical method to evaluate the speed of NCL rings has been developed. The analytical predictions are verified by a Synopsys simulation and excellent agreement between the theoretical predictions and simulation results is obtained. Some important principles for ring optimisation are obtained. The analysis leads to the speed opt... View full abstract»

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  • Prediction of EMI effects in operational amplifiers by a two-input Volterra series model

    Publication Year: 2003, Page(s):185 - 193
    Cited by:  Papers (10)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (548 KB)

    The authors present a new analytical model that describes the nonlinear behaviour of common CMOS operational amplifiers excited by radio-frequency interference (RFI) added to the input nominal signals. The new model is a valid support to analogue integrated circuit designers since it expresses a relationship between circuit parameters, parasitic elements and the amplitude of the RFI induced output... View full abstract»

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  • CMOS single-input differential-output amplifier cells

    Publication Year: 2003, Page(s):194 - 198
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (388 KB)

    The paper addresses the design of CMOS amplifiers with inherent single-to-differential conversion for use in high-frequency applications. Design techniques for stabilising the operating point and providing substantial increase in gain and/or bandwidth performance are also discussed. Simulations on designs using a 0.8-μm technology are provided confirming the accuracy of the expected performance... View full abstract»

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