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Software, IEE Proceedings -

Issue 2 • Date April 2003

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Displaying Results 1 - 10 of 10
  • Wait-free cache-affinity thread scheduling

    Publication Year: 2003, Page(s):137 - 146
    Cited by:  Papers (1)  |  Patents (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1155 KB)

    Cache utilisation is often very poor in multithreaded applications, due to the loss of data access locality incurred by frequent context switching. This problem is compounded on shared memory multiprocessors when dynamic load balancing is introduced, as thread migration disrupts cache content. Batching, a technique for reducing the negative impact of fine grain multithreading on cache performance ... View full abstract»

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  • Graphical modelling language for specifying concurrency based on CSP

    Publication Year: 2003, Page(s):108 - 120
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1318 KB)

    A graphical modelling language for specifying concurrency in software designs is presented. The language notations are derived from the communicating sequential process (CSP) language and the resulting designs form CSP diagrams. The notations reflect both data-flow and control-flow aspects of concurrent software architectures. These designs can automatically be described by CSP algebraic expressio... View full abstract»

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  • CSP extended: imperative state and true concurrency

    Publication Year: 2003, Page(s):61 - 69
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (997 KB)

    CSPP is an extension of CSP and HCSP is in turn an extension of CSPP which captures the semantics of hardware compilation. Because it is a superset of CSPP, it can describe both hardware and software and so is useful for co-design. The extensions beyond CSPP include: true concurrency; new hardware constructors; and a simple and natural way to represent an imperative state. Both CSPP and HCSP were ... View full abstract»

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  • View-centric reasoning for Linda and Tuple Space computation

    Publication Year: 2003, Page(s):71 - 83
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1145 KB)

    In contrast to sequential computation, concurrent computation gives rise to parallel events. Efforts to translate the history of concurrent computations into sequential event traces result in the potential uncertainty of the observed order of these events. Loosely coupled distributed systems complicate this uncertainty even further by introducing the element of multiple imperfect observers of thes... View full abstract»

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  • Predicate transformers in the semantics of Circus

    Publication Year: 2003, Page(s):85 - 94
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1034 KB)

    Circus is a combination of Z and CSP; its chief distinguishing feature is the inclusion of the ideas of refinement calculus. The main objective is the definition of refinement methods for concurrent programs. The original semantic model for Circus is Hoare and He's (1998) unifying theories of programming. An equivalent semantics based on predicate transformers is presented. With this model, a more... View full abstract»

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  • Extending CSP: denotational semantics

    Publication Year: 2003, Page(s):51 - 60
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (988 KB)

    Modern CSP is an algebra which describes processes which engage in events. Its characteristic comprehensiveness combined with simplicity arises in large part from the fact that it was originally defined by a denotational semantics. This sets it apart from other process algebras. Part of the simplicity of CSP arises from its high level of abstraction. In particular, conventional CSP abstracts from ... View full abstract»

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  • Prioritised dynamic communicating and mobile processes

    Publication Year: 2003, Page(s):121 - 136
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1496 KB)

    Continuing research on language design, compilation and kernel support for highly dynamic concurrent reactive systems is reported. The work extends the occam multiprocessing language, which is both sufficiently small to allow for easy experimentation and sufficiently powerful to yield results that are directly applicable to a wide range of industrial and commercial practice. Classical occam was de... View full abstract»

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  • Java PastSet: a structured distributed shared memory system

    Publication Year: 2003, Page(s):147 - 153
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (679 KB)

    The architecture and performance of a Java implementation of a structured distributed shared memory system, PastSet, is described. The PastSet abstraction allows programmers to write applications that run efficiently on different architectures, from clusters to widely distributed systems. PastSet is a tuple-based three-dimensional structured distributed shared memory system, which provides the pro... View full abstract»

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  • The Honeysuckle programming language: an overview

    Publication Year: 2003, Page(s):95 - 107
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1327 KB)

    A language for programming systems with communicating process architecture is introduced which builds on the success of occam. The principal innovations are presented, such as a priori deadlock-freedom, a transfer primitive, which conveys object ownership, and an alternation construct. The latter affords direct expression of prioritised reactive (event-driven) behaviour, including exception respon... View full abstract»

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  • Configuration discovery and mapping of a home network

    Publication Year: 2003, Page(s):155 - 160
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (695 KB)

    A home network comprising many heterogeneous devices requires a scaleable interconnect capable of satisfying the often vastly different network resource demands of the devices. In addition, it is likely that over time the configuration of the network will change as new devices are added to the network and older ones removed or replaced. While it is acceptable for enterprise networks to be managed ... View full abstract»

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