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Electron Device Letters, IEEE

Issue 6 • Date June 1991

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Displaying Results 1 - 25 of 32
  • DC and AC characteristics of a nonalloyed delta-doped MESFET by atomic layer epitaxy

    Page(s): 258 - 260
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    The growth and fabrication of a nonalloyed delta-doped FET entirely grown by atomic layer epitaxy are reported. The DC and RF performances are shown to be comparable to similar devices fabricated on materials grown by other techniques. FETs having a gate length of 1.5 mu m show transconductances as high as 144 mS/mm at a current density of 460 mA/mm. The breakdown voltage for these devices is between 20 and 25 V for a gate-to-drain spacing of 1.6 mu m. An f/sub T/ and f/sub max/ of 13 and 19 GHz were obtained respectively. These values are among the highest values reported for MESFETs with similar geometry.<> View full abstract»

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  • Effect of emitter contact materials on high-performance vertical p-n-p transistors

    Page(s): 261 - 263
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    Ion-implant doped polysilicon, in situ doped polysilicon, and in situ doped ultrahigh vacuum chemical vapor deposition (UHV/CVD) low-temperature epitaxial silicon emitter contacts were used to fabricate shallow junction vertical p-n-p transistors. The effect of these materials on emitter junction depth and on device characteristics is reported. A DC current gain as high as 45 was measured on polysilicon emitter devices. Regardless of emitter contact material, all devices showed sufficiently high breakdown voltages for circuit applications. However, only for ion-implant doped polysilicon emitter devices was the narrow-emitter effect observed through the emitter-collector punchthrough voltage, emitter resistance, and current gain measurements.<> View full abstract»

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  • Doping of trench capacitors by rapid thermal diffusion

    Page(s): 264 - 266
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    A new rapid thermal diffusion process for shallow, heavily doped trench junctions in high density dynamic RAMs is described. Planar dopant sources are formed by spin-coating rigid substrates, such as silicon wafers or solid dopant sources, with liquid dopants. Diffusion takes place at high temperatures when the source, placed in proximity to the silicon wafer, releases dopant via evaporation followed by diffusion to the silicon surface. Well-controlled, heavily doped shallow junctions are readily obtained for B, P, and As. The doping process is shown to provide uniform doping of high-aspect-ratio trenches. Process control is achieved by controlling the wafer temperature and duration of the process. Junction depths near 0.1 mu m have been demonstrated over the entire surface of trenches 0.7 mu m in diameter and 6 mu m in depth.<> View full abstract»

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  • High-frequency time-dependent breakdown of SiO/sub 2/

    Page(s): 267 - 269
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    The time-dependent dielectric breakdown of thin oxides (8.6-11 nm) are compared under DC, pulse, and bipolar pulse conditions for frequencies up to 4 MHz. Lifetime under unipolar pulse conditions does not deviate largely from that under DC conditions; however, lifetime under bipolar stress conditions increases by a factor of 40 to 100 at frequencies above 10 kHz. The field accelerations of breakdown time are similar for DC and pulse stressing.<> View full abstract»

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  • Effect of p-base sheet and contact resistances on static current-voltage characteristics of scaled low-voltage vertical power DMOSFETs

    Page(s): 270 - 272
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    Static current-voltage characteristics of low-voltage scaled power double-diffused MOSFETs fabricated using selectively formed TiSi/sub 2/ films on gate polysilicon and source contact regions are reported. It is shown that considerable modulation of drain-source current-voltage characteristics results from increased p-base sheet and contact resistances. This effect is found to vanish at higher operating temperatures. Increased p-base contact resistance also results in a large forward voltage drop for the body p-n junction diode.<> View full abstract»

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  • Hot-electron-induced traps studied through the random telegraph noise

    Page(s): 273 - 275
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    Random telegraph signal (RTS) measurements have been used to study individual hot-carrier-induced traps in nMOSFETs. It is shown that single filling and emptying can cause 0.1% step noise in channel current. Trap location (3-10 A from interface), time constant ( approximately 10 ms), and energy are found to be quite different from those of prestress (process-induced) traps. The type (acceptor or donor) of the traps can also be identified by RTS measurements; both the process and stress-induced traps with energies near the conduction band edge are found to be of the acceptor type for nMOSFETs and trap levels near the valence band edge are found to be of the donor type for pMOSFETs. Using RTS as a characterization tool, it is found that the stress-induced interface traps are located closer to the interface, resulting in shorter time constants and a stronger influence on the surface mobility than the process-induced traps.<> View full abstract»

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  • Silicon optical modulators at 1.3- mu m based on free-carrier absorption

    Page(s): 276 - 278
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    Silicon optical waveguide modulators, appropriate for operation in the 1.3-1.55 mu m wavelength region, have been fabricated and their performance characterized at the wavelength of 1.3 mu m. The modulator structures consist of p-i-n diodes integrated with silicon waveguides; device operation is based on free-carrier absorption. Modulation depths of -6.2 dB and response times less than 50 ns have been measured. Experimental results are compared with the p-i-n diode theory. It is argued that the device is suitable for integration with silicon electronics and silicon optoelectronic devices. The response times measured for the current devices may be improved by reducing the transverse dimensions of the p-i-n structure.<> View full abstract»

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  • Direct-Schottky-contact InP MESFET

    Page(s): 279 - 280
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    The design and fabrication of an InP MESFET with excellent I-V characteristics are reported. A record high transconductance of 110 mS/mm was measured for a 1- mu m gate length direct-Schottky-contact InP MESFET, where the InP surface was not passivated or treated prior to the deposition of the gate contact. Microwave measurements show an f/sub max/ of 11.6 GHz for this typical nominal 1- mu m gate length device. A p-type planar doped layer was inserted between the buried n-type channel and the device surface at 18 nm from the gate metal. This planar layer enhances the Schottky barrier height and device performance.<> View full abstract»

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  • Thermally stable, superlattice-enhanced 1.3- mu m InGaAs IMSM photodetectors on GaAs substrates

    Page(s): 281 - 283
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    Dark current, DC responsivity, and high-frequency response data of 1.3- mu m interdigitated metal-semiconductor-metal (IMSM) photodetectors on a thermally stable, superlattice-enhanced InGaAs/GaAs structure are reported. Auger analysis revealed that the superlattice cap layer is capable of inhibiting the out-diffusion of indium to the surface during high-temperature annealing cycle, thus minimizing the degradation of the optical and electrical characteristics of the photodetectors fabricated on this material. The internal quantum efficiency and high-frequency bandwidth of the detectors are over 91% and 14 GHz, respectively. The stability of this IMSM structure to high-temperature annealing offers the potential for fabrication of low-cost, long-wavelength monolithic receivers based oil GaAs MESFET technology.<> View full abstract»

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  • OMCVD-grown In/sub 0.4/Al/sub 0.6/As/InP quantum-well HEMT

    Page(s): 284 - 286
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    The transport properties and device characteristics of pseudomorphic In/sub 0.4/Al/sub 0.6/As/InP modulation-doped heterostructures are investigated. The existence of a two-dimensional electron gas at the heterojunction was confirmed by Shubnikov-de Haas measurements. A high electron mobility transistor (HEMT) having a gate length of 1.5 mu m showed extrinsic transconductances and drain current densities as high as 160 mS/mm and 300 mA/mm, respectively. The HEMT also showed a very small output conductance of less than 2 mS/mm and high gate-drain breakdown voltage of larger than 15 V. These results show the great potential of this HEMT for high-voltage gain and high-power microwave applications.<> View full abstract»

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  • Growth and metallization of AlGaAs/GaAs carbon-doped HBTs using trimethylamine alane by CBE

    Page(s): 287 - 289
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    It is shown that the entire structure of high-quality AlGaAs/GaAs heterojunction bipolar transistors (HBTs) including a nonalloyed delta -doped ohmic contact and in-situ Al metallization can be grown by chemical beam epitaxy (CBE) using a new precursor, trimethylamine alane, as the Al source. The graded Al/sub x/Ga/sub 1-x/As and uniform GaAs bases (both approximately 1000 A thick) are doped with carbon to high 10/sup 19/ cm/sup -3/ using trimethyl-Ga. A current gain of 10 at a current density of 2500 A/cm/sup 2/ is obtained for both uniform- and graded-base HBTs. Both devices show good output characteristics.<> View full abstract»

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  • Hot-carrier-induced degradation of the back interface in short-channel silicon-on-insulator MOSFETS

    Page(s): 290 - 292
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    The tolerance of silicon-on-insulator MOSFETs to hot-carrier injection into the buried oxide is investigated. It is shown that stressing of the back channel results in reversible electron trapping and formation of localized defects at the buried interface. This damage is responsible for the transconductance overshoot, large threshold voltage shift, and attenuated kink effect. It is also noticed that even in moderately thin films the back oxide damage does not affect the front-channel operation and, conversely, stressing the front channel does not generate defects at the buried interface. These findings indicate that the hot-carrier degradation of the buried oxide might be chosen as a sensitive criterion for optimizing SIMOX (separation by implantation of oxygen) structures.<> View full abstract»

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  • Long-wavelength Ge/sub x/Si/sub 1-x//Si heterojunction infrared detectors and 400*400-element imager arrays

    Page(s): 293 - 296
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    Heterojunction Ge/sub x/Si/sub 1-x//Si internal photoemission infrared detectors exhibiting nearly ideal thermionic-emission dark-current characteristics have been fabricated with cutoff wavelengths out to 16 mu m. High-quality imaging without uniformity correction has been demonstrated in the long-wavelength infrared (LWIR) spectral band for 400*400-element focal plane arrays consisting of Ge/sub 0.44/Si/sub 0.56/ detectors with a cutoff wavelength of 9.3 mu m and monolithic charged-coupled-device readout circuitry. The Ge/sub 0.44/Si/sub 0.56/ composition was chosen in order to obtain a barrier height low enough to yield a cutoff length within the LWIR band, but high enough to permit low dark-current operation at about 50 K.<> View full abstract»

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  • Current-handling and switching performance of MOS-controlled thyristor (MCT) structures

    Page(s): 297 - 299
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    Experimental results are reported for array-type MCT devices fabricated using a BiMOS process with additional power-specific fabrication steps. Stationary measurements of both the thyristor forward behavior and the intrinsic p-channel MOSFET switch characteristics are an indication of the device quality. Through dynamic testing procedures, the device was analyzed in its transient current handling. The combination of anode current and blocking voltage values is the highest ever reported on MCT devices (2 kV, 5 A, in 2 mu s).<> View full abstract»

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  • Threshold voltage instability at low temperatures in partially depleted thin-film SOI MOSFETs

    Page(s): 300 - 302
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    A threshold voltage instability phenomenon at low temperatures in partially depleted thin-film silicon-on-insulator (SOI) SIMOX (separation by implantation of oxygen) MOSFETs is reported. This phenomenon was investigated under normal MOSFET operating conditions for temperatures ranging from 300 K down to 10 K, with both the magnitude and duration of the instability observed to be strongly dependent on temperature. Threshold voltage shifts as small as 0 V at room temperature and as large as 0.29 V at 10 K are reported. The duration of the instability ranged in the tens of minutes and was observed to increase as the temperature was decreased.<> View full abstract»

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  • Graded-base Si/Si/sub 1-x/Ge/sub x//Si heterojunction bipolar transistors grown by rapid thermal chemical vapor deposition with near-ideal electrical characteristics

    Page(s): 303 - 305
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    Graded-base and uniform-base Si/Si/sub 1-x/Ge/sub x//Si heterojunction bipolar transistors with near-ideal base and collector currents have been fabricated by rapid thermal chemical vapor deposition. The temperature dependences of the collector currents are shown to obey a simple analytical model of an effective Gummel number. The model can be applied to devices which have arbitrary base profiles. The base currents are independent of base composition, and current gains in excess of 11000 have been observed at 133 K.<> View full abstract»

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  • High-power-density GaAs MISFETs with a low-temperature-grown epitaxial layer as the insulator

    Page(s): 306 - 308
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    A GaAs layer grown by molecular beam epitaxy at 200 degrees C is used as the gate insulator for GaAs MISFETs. The gate reverse breakdown and forward turn-on voltages, are improved substantially by using the high-resistivity GaAs layer between the gate metal and the conducting channel. It is shown that a reverse bias of 42 V or forward bias of 9,3 V is needed to reach a gate current of 1 mA/mm of gate width. A MISFET having a gate of 1.5*600 mu m delivers an output power of 940 mW (1.57-W/mm power density) with 4.4-dB gain and 27.3% power added efficiency at 1.1 GHz. This is the highest power density reported for GaAs-based FETs.<> View full abstract»

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  • Silicon Schottky barriers and p-n junctions with highly stable aluminum contact metallization

    Page(s): 309 - 311
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    Reactively sputtered amorphous Ta/sub 36/Si/sub 14/N/sub 50/ thin films are investigated as diffusion barriers to improve the thermal stability of contacts to electronic devices, specifically between Al overlayers and Si substrates. Electrical measurements on Schottky diodes and on shallow n/sup +/-p junction diodes are used to evaluate the thermal stability of the (Si)/W/sub 48/Si/sub 20/N/sub 32//Ta/sub 36/Si/sub 14/N/sub 50//Al metallization. The W/sub 48/Si/sub 20/N/sub 32/ contacting layer is added to raise the Schottky barrier height on n-type Si. It is shown that a 100-nm-thick Ta/sub 36/Si/sub 14/N/sub 50/ layer effectively prevents the intermixing between Al and Si. With this barrier layer, both shallow junctions and Schottky diodes are electrically stable up to 700 degrees C for 20 min (above the Al melting point of 660 degrees C ), which makes this material the best thin-film diffusion barrier on record.<> View full abstract»

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  • Electron trapping in irradiated SIMOX buried oxides

    Page(s): 312 - 314
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    Presented are new results of X-ray exposure of silicon-on-insulator devices fabricated on SIMOX (separation by implantation of oxygen) substrates. It is shown that the presence of numerous electron traps in the buried oxide may dominate the back-gate threshold voltage shift of strongly irradiated SIMOX transistors. A rebound effect occurs under a negative oxide field, due to the trapping of negative charges rather than to interface states generation. Irradiated transistors also show an increased sensitivity to hot-carrier effects.<> View full abstract»

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  • High-performance bipolar technology for improved ECL power delay

    Page(s): 315 - 317
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    A new shallow trench process for isolation of bipolar devices is shown to allow butting of the emitter-base junction to the field oxide edge, thereby greatly reducing the overall device size and parasitic capacitances. Emitter-coupled logic (ECL) ring-oscillator measurements demonstrate a significant performance leverage, where a delay of 75 ps is obtained at a power of 1.5 mW per gate (power-delay product of 112 fJ ), an improvement of 17% from the nonbutted case. More conventional nonbutted devices have been fabricated with dopant profiles tailored to reduce intrinsic and extrinsic capacitances. These high-performance designs achieve ECL gate delays as small as 26 ps at 5.3 mW, comparable to the fastest ECL delays reported to date.<> View full abstract»

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  • A simple technique for measuring the generation lifetime in SOI-substrate material using the principle of charge centroids

    Page(s): 318 - 320
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    A charge-time measurement, utilizing the charge-centroid principle, is presented for the rapid assessment of silicon-on-insulator (SOI) substrates. The technique is applicable to technologies which involve the formation of a buried dielectric layer with a thin-film body region wherein devices are formed. The measurement is routine and only requires a simple two-terminal SOI capacitor from which the quality of the body region, as indicated by the lifetime, can be assessed prior to device fabrication. This measurement can be carried out on any combination of dopant type. All parameters required by the analysis are obtainable from a simple two-terminal CV plot.<> View full abstract»

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  • Sputtered Ta-Si-N diffusion barriers in Cu metallizations for Si

    Page(s): 321 - 323
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    Electrical measurements on shallow Si n/sup +/-p junction diodes with a 30-nm TiSi/sub 2/ contacting layer demonstrate that an 80-nm-thick amorphous Ta/sub 36/Si/sub 14/N/sub 50/ film prepared by reactive RF sputtering of a Ta/sub 5/Si/sub 3/ target in an Ar N/sub 2/ plasma very effectively prevents the interaction between the Si substrate with the TiSi/sub 2/ contacting layer and a 500-nm Cu overlayer. The Ta/sub 36/Si/sub 14/N/sub 50/ diffusion barrier maintains the integrity of the I-V characteristics up to 900 C for 30-min annealing in vacuum. It is concluded that the amorphous Ta/sub 36/Si/sub 14/N/sub 50/ alloy is not only a material with a very low reactivity for copper, titanium, and silicon, but must have a small diffusivity for copper as well.<> View full abstract»

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  • A low-gate-leakage-current GaAs MESFET with a thin epitaxial silicon layer

    Page(s): 324 - 326
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    An n-channel depletion-mode GaAs MESFET with an Al gate and a 6-A epitaxial Si layer between the metal and the GaAs, grown in situ by molecular beam epitaxy, is described. Its DC electrical characteristics are compared with a similar control structure grown without the Si layer. The gate leakage current in the Al/Si/GaAs MESFETs was three to four orders of magnitude lower than in the control structure, due to all increased barrier height in the Al/Si/n-GaAs Schottky gate of 1.04 eV, versus 0.78 eV for the Al/n-GaAs structure. The differences in threshold voltages, I-V characteristics, and transconductances between the two devices are consistent with an enhanced effective barrier height for the Al/Si/GaAs MESFET.<> View full abstract»

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  • Double-side planar-doped AlGaAs/InGaAs/AlGaAs MODFET with current density of 1 A/mm

    Page(s): 327 - 328
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    AlGaAs/InGaAs/AlGaAs double-side planar-doped (DSPD) pseudomorphic MODFETs of 0.3- mu m gate length with both excellent DC and RF performances are reported. A maximum unilateral gain cutoff frequency of 170 GHz and a maximum current gain cutoff frequency of 60 GHz are achieved. The devices exhibit a maximum transconductance of 500 mS/mm and an extremely high current density of 1 A/mm. These are the highest frequencies reported so far for MODFET devices capable of driving 1-A/mm current density. This current density is the highest ever reported with this type of layer structure.<> View full abstract»

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  • Effect of reduced temperature on the f/sub T/ of AlGaAs/GaAs heterojunction bipolar transistors

    Page(s): 329 - 331
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    The high-frequency and DC performances of single-heterojunction Al/sub 0.25/Ga/sub 0.75/As/GaAs heterojunction bipolar transistors (HBTs) have been measured at temperatures between 300 and 110 K. It is found that the maximum unity-current-gain cutoff frequency increases from 26 GHz at 300 K to 34 GHz at 110 K. It is shown that electron diffusion as determined from the majority-carrier mobility does not accurately estimate the base transit time, at least until corrections for degeneracy and minority-carrier mobility enhancement are included. Reasonable agreement is obtained assuming that base transport is limited by the thermal velocity of electrons at reduced temperatures.<> View full abstract»

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