By Topic

IEE Proceedings E - Computers and Digital Techniques

Issue 4 • Date Jul 1991

Filter Results

Displaying Results 1 - 16 of 16
  • Distributed robot control on transputer network

    Publication Year: 1991, Page(s):169 - 176
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (472 KB)

    The minimum-time control of robot arms has usually been implemented as a two-task procedure, where the appropriate trajectory planning is performed off-line, and then tracking is carried out on-line to achieve the desired motion. However, such an approach is unacceptable whenever the motion is dependent on the on-board sensory equipment operated during the application. An on-line trajectory genera... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • New protocol for multistage interconnection networks

    Publication Year: 1991, Page(s):269 - 275
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (552 KB)

    Multistage interconnection networks (MINs) are a cost-effective way of providing interprocessor communication in multiprocessor systems. Many MIN protocols have been studied in the literature but all are known to suffer from the 'hot-spot' effect which causes network throughput to drop when a particular output pin becomes more heavily utilised (hotter) than the other pins. The paper outlines a pro... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Extending parallelism to memory hierarchies in massively parallel systems

    Publication Year: 1991, Page(s):193 - 202
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (776 KB)

    The paper introduces the generalized hierarchical massively parallel system (MPS) and extends data transfer parallelism to all members of the memory hierarchy. Methods are presented for connecting multiple parallel disks and parallel memory modules to the generalized hierarchical MPS. Full utilisation of data transfer bandwidth between disks and processing elements is facilitated by structuring an... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Microprocessor design using silicon compiler

    Publication Year: 1991, Page(s):232 - 240
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (676 KB)

    The problems of designing microprocessors using a silicon compiler are discussed. The example used throughout is the Motorola MC6800. Details are given as to how the software description of the microprocessor was developed and optimised, how it was tested, and the necessary modifications required for the silicon compiler used. Consideration is given to faster, parallel architectures which give sig... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Families of sequences and arrays with good periodic correlation properties

    Publication Year: 1991, Page(s):260 - 268
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (596 KB)

    Families of binary sequences with good periodic correlation properties and large linear span are described which are derived from certain multiple-valued linear feedback shift registers with composite characteristic polynomials. Multiple-valued pseudorandom arrays constructed from parent m-sequences are used to describe and analyse the formation and properties of these families. A general construc... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Learning systems: theory and application

    Publication Year: 1991, Page(s):183 - 192
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (724 KB)

    A survey of the state of the art in learning systems (automata and neural networks) which are of increasing importance in both theory and practice is presented. Learning systems are a response to engineering design problems arising from nonlinearities and uncertainty. Definitions and properties of learning systems are detailed. An analysis of the reinforcement schemes which are the heart of learni... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Multiple bus network with overlapping connectivity

    Publication Year: 1991, Page(s):281 - 284
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (280 KB)

    A multiple bus multiprocessor network with overlapping connectivity is presented. An overlapping connectivity network allows each processor to directly reach a group of memory modules. The groups of memory modules of adjacent processors overlap. Using simulation, it is demonstrated that the bandwidth of the overlapping connectivity multiple bus network significantly exceeds that of a conventional ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Systolic accelerator for parametric surface modelling

    Publication Year: 1991, Page(s):223 - 231
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (544 KB)

    Two classes of systolic architectures are presented that are able to compute bicubical B-spline or Bezier polynomial coefficients and carry out polynomial evaluations. Using a pair of full arrays it is possible to compute all the coefficients in parallel, and to evaluate the polynomials for a given surface, as well as provide a speedup factor of more than 1500 compared with the single processor co... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Novel approach for implementing convolutions with small tables

    Publication Year: 1991, Page(s):255 - 259
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (308 KB)

    The author presents an algorithm, the one over eight squared algorithm, which can be useful in computing tasks with convolutional complexity, such as convolutions, correlations and complex multiplications. The algorithm reduces the address space requirement and hardware investment for table lookup implementations of such tasks from 22n to 2n, where n is the width of the opera... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • High-speed single error correcting convertor for residue number processing

    Publication Year: 1991, Page(s):177 - 182
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (332 KB)

    A pipelined systolic design for residue error correction using the Chinese remainder theorem is described which has a higher throughput compared with previous methods and minimum time latency. In addition, the design has the capability of overflow detection and self-diagnostics. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Fault-tolerant serial-parallel multiplier

    Publication Year: 1991, Page(s):276 - 280
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (360 KB)

    The paper presents a fault-tolerant circuit design using a time-redundancy method for a serial-parallel multiplier, which is useful in DSP applications with serial data transmission. It utilises the (RECO recomputing with circularly shifted operands) technique to detect errors concurrently. A simple OR-gate based circuit is used as the location table to identify faulty bit-slice pairs. The reconfi... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Fault simulation in CMOS VLSI circuits

    Publication Year: 1991, Page(s):203 - 212
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (556 KB)

    In digital complementary metal-oxide semiconductor (CMOS) very large-scale integration (VLSI) circuits, physical faults, such as transistor stuck-closed, floating line faults and bridging faults (which include gate-to-drain shorts) cause complex analogue behaviour of the digital circuit. Some of these faults create an intermediate voltage level, which classical switch-level fault simulator techniq... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Pseudorandom number generators for VLSI systems based on linear cellular automata

    Publication Year: 1991, Page(s):241 - 249
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (492 KB)

    The use of a simple hybrid cellular automaton (combining rules 90 and 150 in Wolfram's notation) as a built-in self test (BIST) structure for VLSI systems is considered. Two six-bit pseudorandom number generators based on cellular automata (CA) and LFSR have been designed using 2 mu m design rules for an N-well CMOS process. Layout has been achieved using ChipWise. Comparative performance studies ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Multipeak histogram analysis in region splitting: a regularisation problem

    Publication Year: 1991, Page(s):285 - 288
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (208 KB)

    The paper describes an application of regularisation to the problem of estimating the cutoff threshold parameter for splitting the regions within an image by using its multimodal histogram. The analysis involves generating a multiple description of a histogram by smoothing it with cubic splines, locating peaks and valleys from it, and finally selecting the cutoff threshold by computing a score. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Performance estimation of semirandom data transfer within direct hypercube interconnection network

    Publication Year: 1991, Page(s):213 - 222
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (552 KB)

    A useful theoretical model for the transfer of data inside a hypercube multiprocessing network is developed. This model defines a statistical parameters lambda which can be interpreted both as an average distance travelled by data within the network and as a measurement of how much memory sharing occurs within the network during the execution of a program. A simple model for the node in a distribu... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Geometrical testing of three-dimensional objects with the aid of pattern recognition

    Publication Year: 1991, Page(s):250 - 254
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (316 KB)

    The paper deals with the automatic geometrical testing of three-dimensional objects from profile range images. This involves a scheme for automatically aligning, comparing and best fitting profile range images of a component with a corresponding model. Profile range images are directly obtained using range finding equipment. After an alignment process, these are then compared with mathematical mod... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.