Solid-State Circuits, IEEE Journal of
Issue 2 • Date Feb. 2003
Society Sponsor
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Displaying Results 1 - 25 of 28
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Patent abstracts
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PDF (550 KB)
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An all-digital PLL for frequency multiplication by 4 to 1022 with seven-cycle lock time
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PDF (831 KB)
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Logic synthesis and circuit modeling of a programmable logic gate based on controlled quenching of series-connected negative differential resistance devices
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PDF (476 KB)
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A study of digital and analog automatic-amplitude control circuitry for voltage-controlled oscillators
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PDF (389 KB)
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A capacitive fingerprint sensor chip using low-temperature poly-Si TFTs on a glass substrate and a novel and unique sensing method
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PDF (506 KB)
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A 10-b 30-MS/s low-power pipelined CMOS A/D converter using a pseudodifferential architecture
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PDF (391 KB)
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A low-power 256-Mb SDRAM with an on-chip thermometer and biased reference line sensing scheme
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PDF (768 KB)
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A 0.5-V power-supply scheme for low-power system LSIs using multi-Vth SOI CMOS technology
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PDF (992 KB)
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A low-power 5-70-MHz seventh-order log-domain filter with programmable boost, group delay, and gain for hard disk drive applications
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PDF (868 KB)
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A biomorphic digital image sensor
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PDF (1147 KB)
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A 10-Gb/s data-pattern independent clock and data recovery circuit with a two-mode phase comparator
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PDF (542 KB)
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On-die termination resistors with analog impedance control for standard CMOS technology
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PDF (328 KB)
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Millimeter-wave VCOs with wide tuning range and low phase noise, fully integrated in a SiGe bipolar production technology
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PDF (666 KB)
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Aims & Scope
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.
Meet Our Editors
Editor-in-Chief
Un-Ku Moon
Oregon State University, EECS
