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IEEE Circuits and Systems Magazine

Issue 4 • 2002

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Displaying Results 1 - 7 of 7
  • VLSI Transactions Best Paper Award

    Publication Year: 2002, Page(s): 49
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  • IEEE CAS fellow profiles 2002: Michael W. Marcellin - For contributions to data compression and constrained coding systems

    Publication Year: 2002, Page(s): 52
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  • IEEE CAS fellow profiles 2002: Jan Van der Spiegel - For contributions in biologically motivated sensors and information processing systems

    Publication Year: 2002, Page(s): 52
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    Freely Available from IEEE
  • IEEE CAS fellow profiles 2002: Wolfgang Porod - For contributions to circuit concepts and architectures for nanoelectronics

    Publication Year: 2002, Page(s): 52
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    Freely Available from IEEE
  • Technology trends toward a system-in-a-module in power electronics

    Publication Year: 2002, Page(s):4 - 22
    Cited by:  Papers (59)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (656 KB) | HTML iconHTML

    Currently, assemblies of power semiconductor switches and their associated drive circuitry are available in modules. From a few 100 watts downward, one finds silicon monolithic technology as the integration vehicle, while upward into the multi-kilowatt range, mixed mode module construction is used. This incorporates monolithic, hybrid, surface mount and wirebond technology. However, a close examin... View full abstract»

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  • A framework for reconfigurable computing: task scheduling and context management-a summary

    Publication Year: 2002, Page(s):48 - 51
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (239 KB) | HTML iconHTML

    Reconfigurable computing is consolidating itself as a real alternative to ASICs (Application Specific Integrated Circuits) and general-purpose processors. The main advantage of reconfigurable computing derives from its unique combination of broad applicability, provided by the reconfiguration capability, and achievable performance, through the potential parallelism exploitation. The key aspects of... View full abstract»

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  • Implementation approaches for the Advanced Encryption Standard algorithm

    Publication Year: 2002, Page(s):24 - 46
    Cited by:  Papers (56)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (362 KB) | HTML iconHTML

    This paper addresses various approaches for efficient hardware implementation of the Advanced Encryption Standard algorithm. The optimization methods can be divided into two classes: architectural optimization and algorithmic optimization. Architectural optimization exploits the strength of pipelining, loop unrolling and sub-pipelining. Speed is increased by processing multiple rounds simultaneous... View full abstract»

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Aims & Scope

The magazine covers the subject areas represented by the Society's transactions, including: analog, passive, switch capacitor, and digital filters; electronic circuits, networks, graph theory, and RF communication circuits; system theory; discrete, IC, and VLSI circuit design; multidimensional circuits and systems; large-scale systems and power networks; nonlinear circuits and systems, wavelets, filter banks, and applications; neural networks; and signal processing.

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Meet Our Editors

Editor-in-Chief
Chi K. Tse
Hong Kong Polytechnic University