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Advanced Packaging, IEEE Transactions on

Issue 3 • Date Aug 2002

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Displaying Results 1 - 17 of 17
  • Validation and test issues related to noise induced by parasitic inductances of VLSI interconnects

    Page(s): 329 - 339
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (561 KB)  

    Shows the results of studies of noise induced by various combinations of parasitic capacitances and inductances. Interconnects are simulated with parameters obtained from a 0.18 μm process. The four kinds of noise addressed are (i) crosstalk pulse; (ii) crosstalk speedup and slowdown; (iii) oscillatory noise; (iv) combination of oscillatory noise and crosstalk pulse. The crosstalk effects induced by a combination of mutual capacitance and mutual inductance can be larger than those induced by mutual capacitance alone, even if capacitive crosstalk dominates. For certain interconnects that are capacitively and inductively coupled, transitions in the same direction on an aggressor and victim line can cause speedup or slowdown, depending on timing parameters. A similar observation holds for transitions in opposite directions. We also observe that oscillatory noise can combine with crosstalk pulse under certain skew conditions and give rise to a large magnitude of noise. We show that inductance induced noise can be a problem in medium length interconnects. Because such interconnects can occur in combinational logic blocks, the generation of suitable vectors for test and validation of such logic blocks is of concern. View full abstract»

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  • Inductance effect in crosstalk prediction

    Page(s): 340 - 346
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (725 KB) |  | HTML iconHTML  

    Rapid progress in integrated circuit technology has led to an increase in switching speeds of digital circuits. This increase is the primary reason why inductance noise causes chips to fail. As a result, there is a growing interest in the inductance associated with on-chip signal lines. In this paper, we present the electromagnetic analysis we have followed in order to determine the accurate values of the R,L,C,G equivalent parameters from which a set of multiple coupled transmission lines could be modeled. We then determine the most critical parameters which make the inductance effect important and we propose a new analytical expression to accurately evaluate the crosstalk voltage. View full abstract»

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  • New efficient method of modeling electronics packages with layered power/ground planes

    Page(s): 417 - 423
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (606 KB) |  | HTML iconHTML  

    The modeling of electrical performances of electronics packages is very important for the design of advanced packaging technology. However, it is also one of the most difficult tasks. This paper introduces a new efficient boundary integral equation technique for the modeling of electromagnetic fields in electronics packages. This approach dramatically reduces the computation requirement and can be conveniently integrated with circuit solvers. Skin-effect loss from the metal planes, dielectric loss from the substrate, together with the nonperfect reflections from the perimeter of planes and their frequency-dependent characteristics can all be taken into account. Correlation performed on test printed circuit boards shows good agreement between the measurement and the numerical results up to several GHz. View full abstract»

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  • Thermal and electroless deposition of copper on poly(tetrafluoroethylene-co-hexafluoropropylene) films modified by surface graft copolymerization

    Page(s): 365 - 373
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (614 KB) |  | HTML iconHTML  

    Surface modification of Ar plasma-pretreated poly(tetrafluoroethylene-co-hexafluoropropylene) (FEP) film via UV-induced graft copolymerization, under atmospheric conditions, with 4-vinylpyridine (4VP), 2-vinylpyridine (2VP) and 1-vinylimidazole (VIDz) was carried out to improve the adhesion with the thermally evaporated and the electrolessly deposited copper. The surface composition and structure of the graft-copolymerized FEP films were characterized by X-ray photoelectron spectroscopy (XPS) and atomic force microscope (AFM), respectively. The electroless plating of copper on the graft-copolymerized FEP film could be carried out in the absence of sensitization by SnCl2 (the Sn-free activation process). The adhesion strength of the thermally evaporated and the electrolessly deposited copper on the FEP surfaces was affected by the type of monomers used for graft copolymerization and the surface graft concentration. The T-peel adhesion strengths of the electrolessly deposited copper on the 4VP, 2VP and VIDz graft-copolymerized FEP films with 90-s of Ar plasma pretreatment were about 9.8 N/cm, 7.3 N/cm and 4.9 N/cm, respectively. View full abstract»

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  • An X-band small outline leaded plastic package for MMIC applications

    Page(s): 439 - 447
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    A new small outline (SO) leaded plastic package has been developed that improves return loss, insertion loss, and isolation performance over that of a shrink small outline package (SSOP) in the same body size. A custom TRL calibration kit was developed, and prototype packages built and measured. The measured package showed an increase in the application bandwidth of SO-type packages from 5 GHz to over 8 GHz. Further investigations using full-wave electromagnetic simulations reveal a potential increase in return loss of better than 30 dB to 10 GHz, giving the package a usable bandwidth well into the X-band (8-12GHz). Applications for the new package are in microwave and RFIC applications. View full abstract»

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  • A compact LTCC-based Ku-band transmitter module

    Page(s): 374 - 384
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1184 KB) |  | HTML iconHTML  

    Presents design, implementation, and measurement of a three-dimensional (3-D)-deployed RF front-end system-on-package (SOP) in a standard multi-layer low temperature co-fired ceramic (LTCC) technology. A compact 14 GHz GaAs MESFET-based transmitter module integrated with an embedded bandpass filter was built on LTCC 951AT tapes. The up-converter MMIC integrated with a voltage controlled oscillator (VCO) exhibits a measured up-conversion gain of 15 dB and an IIP3 of 15 dBm, while the power amplifier (PA) MMIC shows a measured gain of 31 dB and a 1-dB compression output power of 26 dBm at 14 GHz. Both MMICs were integrated on a compact LTCC module where an embedded front-end band pass filter (BPF) with a measured insertion loss of 3 dB at 14.25 GHz was integrated. The transmitter module is compact in size (400 × 310 × 35.2 mil3), however it demonstrated an overall up-conversion gain of 41 dB, and available data rate of 32 Mbps with adjacent channel power ratio (ACPR) of 42 dB. These results suggest the feasibility of building highly SOP integrated RF front ends for microwave and millimeter wave applications. View full abstract»

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  • Finite ground coplanar waveguide (FGC) low loss, low coupling 90-degree crossover junctions

    Page(s): 385 - 392
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (4145 KB) |  | HTML iconHTML  

    Microwave and millimeter-wave integrated circuits and RF distribution networks often require two transmission lines to cross over each other. In this paper, experimental measurements and three-dimensional (3-D) finite difference time domain analysis are used to thoroughly characterize coplanar waveguide (CPW) and finite ground coplanar waveguide (FGC) 90-degree crossover junctions. It is shown that FGC crossover junctions have approximately 15 dB lower coupling than CPW crossover junctions. Furthermore, it is shown that the FGC junctions do not excite the parasitic slotline mode, whereas, the CPW junctions do excite the slotline mode. The results presented indicate that the FGC crossover junction is easier to implement and has better characteristics than the CPW crossover junction. View full abstract»

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  • Estimating the power bus impedance of printed circuit boards with embedded capacitance

    Page(s): 424 - 432
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (693 KB) |  | HTML iconHTML  

    Embedded capacitance is an alternative to discrete decoupling capacitors and is achieved by enhancing the natural capacitance between closely spaced power and return planes. This paper employs a simple cavity model to investigate the features affecting the power bus impedance of printed circuit boards with embedded capacitance. View full abstract»

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  • Impact of temperature cycle profile on fatigue life of solder joints

    Page(s): 433 - 438
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1315 KB)  

    In this paper the influence of the temperature cycle time history profile on the fatigue life of ball grid array (BGA) solder joints is studied. Temperature time history in a Pentium processor laptop computer was measured for a three-month period by means of thermocouples placed inside the computer. In addition, Pentium BGA packages were subjected to industry standard temperature cycles and also to in-situ measured temperature cycle profiles. Inelastic strain accumulation in each solder joint during thermal cycling was measured by high sensitivity Moire interferometry technique. Results indicate that fatigue life of the solder joint is not independent of the temperature cycle profile used. Industry standard temperature cycle profile leads to conservative fatigue life observations by underestimating the actual number of cycles to failure. View full abstract»

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  • Microwave frequency interconnection line model of a wafer level package

    Page(s): 356 - 364
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (522 KB)  

    In this paper, we introduce the microwave transmission characteristics of interconnection lines on a wafer level package (WLP) and also propose a precise microwave-frequency model of the WLP interconnections. The slow wave factor (SWF) and attenuation constant are measured and discussed. High-frequency measurement is described, based on two-port S-parameter measurements, using an on-wafer microwave probe with a frequency range of up to 5 GHz. The extracted model is represented in the form of distributed lumped circuit model elements and can be easily merged into SPICE simulations. From the extracted model, it was found that line capacitance and inductance per unit length are 0.110 pF/mm and 0.286 nH/mm, respectively. We have successfully applied the extracted model to the design and analysis of a Rambus memory module for time domain simulation and signal integrity simulation. From the simulation, it was found that the WLP has better high-frequency performance, because of its low package inductance, compared with the μBGA package, but longer propagation delay, because of the relatively high package capacitance. View full abstract»

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  • Methods to reduce radiation from split ground planes in RF and mixed signal packaging structures

    Page(s): 409 - 416
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (481 KB) |  | HTML iconHTML  

    Split ground planes are sometimes used in RF and mixed signal packages in order to isolate the RF and analog circuits from the digital circuits. Undesired radiation in a packaging environment may occur when a signal trace is routed over a slot in the ground plane. This paper examines and investigates ways to eliminate signal coupling into split ground plane structures and assesses the impact of this reduced coupling on signal integrity in a packaging environment. Suggested methods to reduce coupling of energy into the slot are to alter the shape of the slot with RF chokes or corrugations. View full abstract»

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  • Characterization of picosecond electric-pulse propagation on CPW components by transient near-field mapping

    Page(s): 459 - 466
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    For the first time, the picosecond electric-pulse propagation characteristics of a few coplanar waveguide (CPW) components, including transmission lines, capacitive open and short terminations and a right-angle bend, have been successfully measured by mapping the time-dependent tangential near-electric-field distributions. The measurement was performed using a two-dimensional photoconductive (PC) near-field mapping system incorporating a recently developed novel PC electric-field probe, which could measure the separate picosecond orthogonal electric-field components with minimal loading effects. The resulting field-images mapped over the structural capacitive open termination and the short termination, showed previously unknown, and quite remarkable, transient picosecond electric-pulse reflection phenomena, which cannot be measured using conventional test instruments. In addition, the images showed that reflection-phenomenon itself required about 1 ps of propagation delay, and that the pulse-reflection from the capacitive open-termination required additional time delay matched to the length of the open-gap between the two slots of the CPW. View full abstract»

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  • Embedded thin film capacitors-theoretical limits

    Page(s): 454 - 458
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (610 KB) |  | HTML iconHTML  

    The large physical size of capacitors and/or excessive values of associated lead inductance are two major limitations in the development of novel packaging modules, with high packaging density, high performance and reliability along with low system cost. Embedded capacitor technology in thin film form offers a promising solution to these limitations. A design space with capacitance density and breakdown voltage as performance properties, with material dielectric constant and film thickness as parameters has been explored, focusing on tantalum pentoxide (Ta2O5) as the dielectric material. An inherent tradeoff is established between breakdown voltage and capacitance density for thin film capacitors. The validity of the proposed design space is illustrated with thin films of Ta2O5, showing deviation from the "best can achieve" breakdown voltage for films thinner than 0.4 μm and films thicker than 1 μm. View full abstract»

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  • Methodology for characterization of high-speed multi-conductor metal interconnections and evaluation of measurement errors

    Page(s): 347 - 355
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (620 KB) |  | HTML iconHTML  

    Analysis and design of interconnects in high speed integrated circuits and systems involves models in the form of multiconductor transmission lines. The fundamental parameters of those models are matrices of capacitance, (C), inductance, (L), resistance, (R), and conductance (G). We present a methodology for measurement of entries in capacitance matrix. The entries of capacitance matrices can be calculated using numerical solvers of electrostatic fields established under the assumption of suitable biasing of interconnect structures. Numerical calculations of complete field equations are very complex and expensive in terms of computer time, therefore several approximations are made in constructing interconnect dedicated software packages available on the market. Because of these approximations it is necessary to validate the calculations via measurements. Calculation of the off-diagonal entries of capacitance matrix from measurements of "two-terminal" capacitances is strongly corrupted by the measuring errors. The method involves direct capacitance measurement in multi-conductor structures and provides analysis of accuracy. View full abstract»

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  • MM-wave microstrip patch and slot antennas on low cost large area panel MCM-D substrates-a feasibility and performance study

    Page(s): 397 - 408
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    This paper analyzes the performance and feasibility of microstrip patch and slot antennas on low-cost thin film MCM-D in the MM-wave frequency range. The critical parameters of millimeter design such as losses, bandwidth, and radiation pattern are discussed based on EM modeling and design examples of microstrip patch and compact rectangular slot loop antennas in the frequency range of 40-85 GHz. Simple technology modifications are pointed out to overcome the basic limitations of the patch antennas on thin films such as low efficiency and low bandwidth. To perform this feasibility study, a finite element method (FEM) is used as a simulation tool and HP8510XF vector network analyzer (VNA) as measurement equipment. View full abstract»

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  • Loss characteristics of high-ϵr microstrip lines fabricated by an etchable thick-film on ceramic MCM technology

    Page(s): 393 - 396
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (346 KB) |  | HTML iconHTML  

    Etchable thick-film multi-chip-module (MCM) technology has led to the possibility of fabricating microwave integrated circuits (MICs) with performance similar to MICs produced using more expensive conventional thin-film MCM-D techniques. However, little data is available on the loss characteristics of the technology at microwave frequencies. This paper describes an experimental investigation into the loss properties of high-definition etchable thick-film MCM microstrip lines formed on a variety of high dielectric constant (high-εr) ceramic substrates. Substrates investigated comprise 96% alumina (εr=9.5), (Zr,Sn)TiO4r=36.6) and BaO-PbO-Nd2O3-TiO2r=90.9). Microstrip loss properties are determined by fabricating a series of loosely coupled half-wave resonators on each substrate, with a range of characteristic impedance values. Measurements to 6 GHz are compared to those for similar lines fabricated using conventional thin-film MCM-D technology. The results demonstrate that etchable thick-film MCM technology provides many of the advantages of thin-film MCM-D technology, such as low-loss and high-definition conductors, and is suitable for the cost-effective fabrication of miniaturised high-performance microstrip MICs in high volume. View full abstract»

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  • Embedded TiNxOy thin-film resistors in a build-up CSP for 10 Gbps optical transmitter and receiver modules

    Page(s): 448 - 453
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    Integral passive components provide efficient circuit miniaturization while maintaining high performance and reducing assembly costs. The development of practical integral passive components, however, requires advances in the areas of materials, low-cost processes, and structural design. We have developed new TiNxOy thin-film resistors, as well as a termination resistor-embedded CSP, and a process for fabricating integral passive components. Our TiNxOy films exhibit a sheet resistivity in the range of 30-5k Ω/square. To keep costs low, we have made the fabrication process compatible with that for MCM-D/L. Resistors as small as 25 μm square have been successfully produced with this process. The chip scale package (CSP) with embedded resistors has been designed for 10 Gbps optical transmitter and receiver modules. A fabricated version shows excellent return loss for its termination resistor, less than -20 dB in the frequency range of 50 MHz-14 GHz, and its resistors showed high reliability in constant voltage stress tests, with less than 5% change in resistance at 800 mW/mm2 over 1000 hours. View full abstract»

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Aims & Scope

IEEE Transactions on Advanced Packaging has its focus on the design, modeling, and application of interconnection systems and packaging: device packages, wafer-scale and multichip modules, TAB/BGA/SMT, electrical and thermal analysis, opto-electronic packaging, and package reliability.

This Transaction ceased production in 2010. The current publication is titled IEEE Transactions on Components, Packaging, and Manufacturing Technology.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Ganesh Subbarayan
Purdue University, School of Mechanical Engineering