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Circuits and Systems, IEEE Transactions on

Issue 2 • Date Feb 1991

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Displaying Results 1 - 11 of 11
  • On the analysis of dynamic feedback neural nets

    Page(s): 196 - 201
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    A formulation for dynamic feedback neural networks of the Hopfield type is presented. A description is given of the general design framework used, in which a neural network would only have a finite number of memories. Some basic properties of the nonzero equilibria as well as the (unstable) equilibrium point at zero in the proposed framework are also discussed View full abstract»

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  • Tunability of biquadratic responses

    Page(s): 223 - 227
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    A simple and efficient criterion for the selection of tuning parameters is introduced. This criterion uses the coefficients of the biquadratic response function exhibited in the frequency domain by certain lumped linear circuits. The tuning criterion takes into consideration the required large range of response variation with an associated small change in the tuning parameter and is based on an overlook of the biquadratic response rather than the locality of the first-order sensitivities. The criterion is justified mathematically and applied to practical examples. Tolerances are assumed in circuit elements, and tunability using this criterion is checked. The post-tuning yield is evaluated and compared with that obtained by other methods View full abstract»

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  • An alternative sensitivity measure for designing low-sensitivity digital biquads

    Page(s): 218 - 221
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    A sensitivity measure is proposed for determining the optimum set of machine-representable multiplier constants in the derivation of low-sensitivity digital biquadratic filters. A comparison of this measure with two other sensitivity measures of this class is then undertaken using four different design examples. The four sixth-order filters considered are a Butterworth low-pass, a Chebyshev high-pass, an elliptic bandstop, and an elliptic bandpass filter. It is shown that the three sensitivity measures usually give slightly different low-sensitivity designs and that the new sensitivity measure often gives the best design View full abstract»

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  • On a class of nonsymmetrical neural networks with application to ADC

    Page(s): 202 - 209
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    For nonzero initial conditions a neural network may stop in a spurious state-that is, in an equilibrium point that does not correspond to the correct digital representation of the input signal. A method based on a particular class of nonsymmetrical neural networks is proposed for eliminating the problem of stopping in spurious states. The dynamical behavior of these structures is studied to prove that they are characterized by a unique equilibrium point which is globally attractive-that is, the system will converge toward this point for every choice of initial conditions and for every choice of (continuous) nonlinearities. The explicit expression obtained for the unique equilibrium point permits one to design the connection strengths between neurons so that the equilibrium coincides with the desired output for a given input signal. The proposed design procedure is applied to the classical example of A/D conversion, showing that this A/D converter structure has no spurious states. The A/D was simulated using SPICE, and experimental results obtained with a discrete component prototype of the converter are presented View full abstract»

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  • A purely capacitive synaptic matrix for fixed-weight neural networks

    Page(s): 210 - 217
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    It is shown that the synaptic function of fixed-weight neural networks can be implemented using only one capacitor. The resulting synaptic matrix, being devoid of active devices, offers very high space-power efficiency and speed along with large synapse capacity with considerable analog depth. The generic capacitor matrix is analyzed on the basis of dendritic charge conservation. The results are used to determine network limitations and to design a double-poly CMOS feedforward classifier that is capable of correcting any 3-b error occurring in a set of thirty 16-b code-patterns. Each synapse occupies 16.5 μm×10 μm of field-oxide space for the very conservative 3-μm rules employed in this particular design. Electrical performance is verified through simulation. Comparison between the proposed network and other switched-capacitor neural network configurations is also included View full abstract»

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  • Sensitivity analysis for a regulating transformer connected to a high impedance source

    Page(s): 227 - 229
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    The sensitivity concept is used to quantify the effectiveness of a voltage regulating transformer or regulator used in an AC circuit where the objective is to raise the voltage across a load connected to a source with high source impedance. The sensitivity concept describes the effectiveness of the regulator under a set of conditions and confirms that the device is completely ineffective when the value of the source reactance equals the value of the load resistance View full abstract»

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  • A note on the modified stability table for linear discrete time systems

    Page(s): 221 - 223
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    It is shown how to obtain the inner determinants of the stability determinantal criterion from the entries of the modified stability table. This requires the expansion of only 2×2 determinants instead of higher-order ones. This constitutes a computational simplification of the determinantal criterion. The results are the discrete analog of obtaining the Hurwitz minors from the Routh table View full abstract»

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  • A state-space approach to orthogonal digital filters

    Page(s): 160 - 169
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    An algorithm for designing multi-input multi-output (MIMO) orthogonal digital filters is developed using a state-space approach. The algorithm consists of three parts: (i) orthogonal embedding, (ii) transformation of the embedded orthogonal transition matrix to the α-extended upper Hessenberg form; and (iii) factorization of this new form into Givens (planar) rotations. Appropriately interconnecting the rotors leads to the pipelined orthogonal filter structure. As a consequence of the approach, for the single-input, single-output (SISO) case, an essentially orthogonal structure is obtained for the inverse filter; only one of the Givens rotors is replaced by a hyperbolic rotor View full abstract»

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  • An error-compensation A/D conversion technique

    Page(s): 187 - 195
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    An architecture for a successive-approximation analog-to-digital (A/D) converter using switched-capacitor techniques is described. The converter design consists of a comparator, two operational amplifiers, and several unit capacitors. The simplicity of the circuit is comparable to that of cyclic A/D converters. An error-compensation technique for reference generation is also proposed that improves the resolution of the converter with relatively few operations. Based on the principle of charge redistribution, the capacitor mismatch error is first stored in an analog manner and the necessary voltage references are generated accurately. The error is then compensated in subsequent conversions. Since this is done in a parallel manner, the speed of the converter is not compromised. The converter has been realized using a 1-μm CMOS technology. The test results indicate that with a conversion time of 20 μs, the chip performs as a monotonic 11-b converter with ±0.9 least significant bit (LSB) differential and ±1.4 LSB integral nonlinearity View full abstract»

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  • A comparison of modulator networks for high-order oversampled ΣΔ analog-to-digital converters

    Page(s): 145 - 159
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    After a discussion of the practical problem of comparing the relative performance of all known high-order modulator networks with respect to resolution, stability, input range, component sensitivities, finite amplifier gains, and bandwidths, equations are derived and verified by computer simulation that relate reduction in signal-to-noise ratio to component mismatch and finite amplifier gain, allowing designers to choose the best network for a particular application. A third-order, sigma-delta (Σ-Δ) oversampled analog-to-digital (A/D) modulator network is presented. It shows improved performance in most respects over previous modulators. Although its theoretical performance in the absence of circuit nonidealities is below that of the triple first-order cascade network, when practical impairments such as finite amplifier gains and component mismatch are considered, it displays superior performance. Gain and offset errors are potentially lower for this network due to its ability to use a single capacitor for input signal and D/A feedback. A markedly reduced sensitivity to nonidealities for this network implies that monolithic circuits could be manufactured with better processing yields and hence lower unit costs View full abstract»

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  • Generalized Bezoutians and families of efficient zero-location procedures

    Page(s): 170 - 186
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    It is shown that the procedures of Routh-Hurwitz and Schur-Cohn for determining the zero-distribution of polynomials with respect to the imaginary axis and the unit circle, respectively, serve, at the same time, to efficiently evaluate the inertia of certain so-called Bezoutian matrices. These procedures require O(n2) operations to determine the inertia of an n×n Bezoutian, in contrast to the O(n3) operations that would be required to determine the inertia of an arbitrary (Hermitian) matrix of the same size. Generalized Bezoutians whose inertia specifies the zero-distribution with respect to arbitrary circles and straight lines in the complex plane are introduced. These Bezoutian matrices are shown to be members in the family of matrices with (generalized) displacement structure, for which efficient O(n2) procedures for triangular factorization exist and, hence, inertial determination. The formulation displays a large variety of O(n2) procedures that can be associated with a single (generalized) Bezoutian matrix. For Bezoutians on the imaginary axis and the unit circle, the formulation leads to (among other possibilities) the Routh-Hurwitz and Schur-Cohn tests View full abstract»

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