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Circuits and Systems, IEEE Transactions on

Issue 1 • Date Jan 1985

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Displaying Results 1 - 17 of 17
  • A hybrid floating-point logarithmic number system processor

    Page(s): 92 - 95
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    The attributes of the traditional floating-point processor and the logarithmic number system are combined. The result is a hybrid system which offers some advantages over the familiar floating-point system. The new system, called the(FU)^{2}, does not require exponent alignment during addition, supports high-speed addition and multiplication, has an efficient accumulator structure, and admits a simple VLSI realization. View full abstract»

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  • Bipolar - JFET - MOSFET negative resistance devices

    Page(s): 46 - 61
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    A systematic method is given for generating negative-resistance circuits made of 2 transistors and linear positive resistors only. The 2 transistors may be bioolar (n-p-norp-n-p),JFET(n-channel or p-channel),MOSFET(n-channel orp-channel), or their combinations. Since the circuits do not require an internal power supply, they are passive and can be integrated as a two-terminal device in monolithic form. Two algorithms are given for generating a negative-resistance device which exhibits either a type-Nupsilon - icharacteristic similar to that of a tunnel diode, or a type-Supsilon -icharacteristic similar to that of a four-layeredp-n-p-ndiode. Hundreds of new and potentially useful negative resistance devices have been discovered. A selected catalog of many such prototype negative-resistance devices is included for future applications. View full abstract»

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  • Multibit convolution using a bit level systolic array

    Page(s): 95 - 99
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    A novel design for multibit convolver circuits is described. The circuits take the form of systolic arrays of simple one-bit processor and memory cells, with the result that they can operate at very high data rates and should be easy to implement using VLSI technology. An efficient method for handling two's complement data within the array is described and the relative advantages of this convolver design compared with more conventional circuits is discussed. View full abstract»

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  • The multibridge charge routing filter

    Page(s): 20 - 27
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1008 KB)  

    A fully integrated recursive charge coupled filter is described. Its construction is based on multiple charge transfers between two contradirected registers, that makes highly effective use of the silicon area. Hence, it is a potential competitor to present switched-circuit filters. This paper describes the principles, the synthesis methods and the present limitations of this device. Finally, the main application to codec filters for digital communications is discussed. View full abstract»

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  • Note on maximal power transfer

    Page(s): 100
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (120 KB)  

    An elementary proof is given of a recent result on maximal power transfer from a Thévenin equivalentn-port to a resistive load, and some related work is cited. View full abstract»

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  • Allpass biquadratic switched-capacitor filters

    Page(s): 1 - 12
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    Biquadratic allpass filters are of great importance for performing phase equalization in highly selective filters such as those employed in modems or other telecommunications equipment. This paper develops and examines topologies for implementing the switched-capacitor (SC) allpass biquad including all of the sampled data effects in the design equations. Several of the topologies allow the maximum capacitance ratios to be reduced over existing allpass biquads which makes the implementation of highQsections simple and more accurate when integrated. A design example and experimental observations are presented for an allpass filter that is optimized for practicality and incorporated into a 40 pole modem filter chip. View full abstract»

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  • Stability analysis for two-dimensional systems via a Lyapunov approach

    Page(s): 61 - 68
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    Some necessary and sufficient conditions are given for stability analysis of two-dimensional (2-D) systems based on a Lyapunov approach. The study was carried out using the Roesser state-space model, which when combined with the Lyapunov theory provides the new checkable tests for stability. Also, the results lead to techniques for selecting stabilizing state feedback gain matrices for the 2-D systems. View full abstract»

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  • An algorithm for the design of single functional observers

    Page(s): 100 - 102
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (272 KB)  

    An elementary proof is given of a recent result on maximal power transfer from a Thévenin equivalentn-port to a resistive load, and some related work is cited. View full abstract»

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  • On error-spectrum shaping in state-space digital filters

    Page(s): 88 - 92
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    A new scheme for shaping the error spectrum in state-space digital filter structures is proposed. The scheme is based on the application of diagonal second-order error feedback, and can be used in any arbitrary state-space structure having arbitrary order. A method to obtain noise-optimal state-space structures for fixed error feedback coefficients, starting from noise optimal structures in absence of error feedback (the Mullis and Roberts Structures), is also outlined. This optimization is based on the theory of continuous equivalence for state-space structures. View full abstract»

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  • A switched-capacitor waveform generator

    Page(s): 103 - 105
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    A generalized switched-capacitor (SC) bistable circuit is presented. This bistable is used to implement a waveform generator capable of frequency and/or amplitude modulation. A technique of preventing the op amp of a SC amplifier from going to zero each clock cycle is described. The predicted performance is confirmed by experimental results. View full abstract»

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  • Pole assignment of a class of multivariable systems using localized dynamic output compensators with prescribed poles

    Page(s): 105 - 107
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    A novel method for stabilizing a class of multivariable systems through pole assignment using decentralized dynamic compensators is presented. The method is particularly useful for designing stabilizers for improved dynamic stability of multimachine power systems; this is illustrated using a numerical example. View full abstract»

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  • Explicit formulas for lattice wave digital filters

    Page(s): 68 - 88
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    Explicit formulas are derived for designing lattice wave digital filters of the most common filter types, for Butterworth, Chebyshev, inverse Chebyshev, and Cauer parameter (elliptic) filter responses. Using these formulas a direct top down design method is obtained and most of the practical design problems can be solved without special knowledge of filter synthesis methods. Since the formulas are simple enough also in the case of elliptic filters, the design process is sufficiently simple to serve as basis in the first part (filter design from specs to algorithm) of silicon compilers or applied to high level programmable digital signal processors. View full abstract»

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  • A simple derivation for a synthesis procedure for 90° fan filters

    Page(s): 107 - 108
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    The transfer function of a fan filter is derived in [1] using transformations on a prototype Butterworth filter. We present an alternate derivation which is much simpler than that of [1] and provides a useful insight leading to more efficient fan filters. View full abstract»

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  • Josephson-junction circuit analysis via integral manifolds-Part II

    Page(s): 34 - 45
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    This paper is a sequel to an earlier paper under the same title. Here we use a more realistic model of the Josephson-junction and present a rigorous analysis of its nonlinear dynamics under various ranges of model parameters. In particular, we prove that the qualitative properties of our model and of the simplified one are similar. This rigorous proof thereby justifies the choice of a simpler Josephson-junction model, which was chosen in the past mainly for tractability. The peculiar constant voltage-step (devil's staircase) phenomenon widely reported in the literature is carefully analyzed further in this paper. For the first time, we can give a fairly complete explanation of the mechanism leading to this exotic phenomenon. In particular, the variations in the length of the constant voltage steps which have baffled many researchers in the past can now be given a rational explanation. An analysis of the mechanisms which give rise to chaotic dynamics in the Josephson-junction circuit is also presented. View full abstract»

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  • Analysis of switched-capacitor networks (SCN) based on capacitor - switch macromodels

    Page(s): 12 - 19
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    In this paper, we present a new method of analysis of switched-capacitor networks (SCN) based on the concept of capacitorswitch (CS) blocks. The combination of any capacitor and its related switches in the SCN is considered as an integral component and the nodes within the combination can be discarded. The size of the admittance matrix is thus great reduced. By this method the time- and frequency-domain responses can be computed efficiently with no limitations on the circuit topology, switching phase, or duty cycle. View full abstract»

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  • A multi-output second-order digital filter structure for VLSI implementation

    Page(s): 108 - 109
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    A multi-output second-order digital filter structure without zero-input and constant-input oscillations is presented. It could be used for the realization of low-pass, high-pass, band-pass, and band-stop Butterworth, Chebyshev, and elliptic digital filters, and all-pass digital filters. The overall structure consists of two delays, three multipliers, and nine adders, which could be adopted for VLSI implementation. View full abstract»

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  • Monotone sensitivity of nonlinear uniform RC transmission lines, with application to timing analysis of digital MOS integrated circuits

    Page(s): 28 - 33
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (688 KB)  

    Recent work by Rubinstein, Penfield, and Horowitz [1] gives simple delay bounds for linearRCladder networks-used to model polysilicon and diffusion interconnect in MOS integrated circuits. This paper presents a theorem that justifies applying these bounds to more realistic interconnect models incorporating nonlinearities. The main result applies to unbranched lines. View full abstract»

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