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IEEE Journal of Solid-State Circuits

Issue 3 • June 1987

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Displaying Results 1 - 25 of 38
  • [Inside front cover - June 1987]

    Publication Year: 1987, Page(s): f2
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  • Table of contents (June 1987)

    Publication Year: 1987, Page(s):313 - 314
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  • Foreword (June 1987)

    Publication Year: 1987, Page(s): 315
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  • Best Paper Award

    Publication Year: 1987, Page(s): 316
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  • 5-Gbit/s Si integrated regenerative demultiplexer and decision circuit

    Publication Year: 1987, Page(s):385 - 389
    Cited by:  Papers (6)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (966 KB)

    A silicon bipolar circuit is presented which may be used as either a 1:2 demultiplexer or a decision circuit up to the bit rate of 5 Gb/s. The circuit was fabricated with a standard bipolar technology with oxide-wall isolation, 2-/spl mu/m emitter stripe widths, and a transit frequency of about 9 GHz at V/SUB CE/=1 V. The high-speed performance of the circuit was achieved by applying a double samp... View full abstract»

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  • Errata to "Analysis and Design Optimization of Domino CMOS Logic with Application to Standard Cells"

    Publication Year: 1987, Page(s): 496
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (128 KB)

    First Page of the Article
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  • Patent abstracts (June 1987)

    Publication Year: 1987, Page(s):497 - 500
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  • [Back inside cover - June 1987]

    Publication Year: 1987, Page(s): b1
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  • A class of analog CMOS circuits based on the square-law characteristic of an MOS transistor in saturation

    Publication Year: 1987, Page(s):357 - 365
    Cited by:  Papers (214)  |  Patents (17)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1216 KB)

    The examined class of circuits includes voltage multipliers, current multipliers, linear V-I convertors, linear I-V convertors, current squaring circuits, and current divider circuits. Typical for these circuits is an independent control of the sum as well as the difference between two gate-source voltages. As direct use is made of the basic device characteristics, only a small number of transisto... View full abstract»

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  • A 32-Kbit variable-length shift register for digital audio application

    Publication Year: 1987, Page(s):415 - 422
    Cited by:  Papers (1)  |  Patents (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1296 KB)

    On the chip described, dynamic shift registers are combined with high-density serial-parallel-serial charge-coupled-device (SPS CCD) memory blocks in order to obtain a switchable chain of delay blocks with delay values that are powers of two. The shift-register length can be adjusted from 17 to 32767 clock periods. The tradeoff between the delay implementations is presented. A detailed description... View full abstract»

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  • A single-chip linear-predictive-coding vocoder

    Publication Year: 1987, Page(s):479 - 487
    Cited by:  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1664 KB)

    A NMOS vocoder IC, compatible with the LPC-10-2400-b/s speech coding standard, is described. The IC implements an adaptive linear predictive coding (LPC) spectral analyzer, a pitch decoder using Gold's algorithm, and a speech synthesizer. The algorithms, architecture, and circuit design methods have been clearly optimized to allow a single-chip implementation. View full abstract»

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  • A 3.6-MHz cutoff frequency CMOS elliptic low-pass switched-capacitor ladder filter for video communication

    Publication Year: 1987, Page(s):378 - 384
    Cited by:  Papers (26)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1304 KB)

    The high frequency (HF) behavior of the switched-capacitor (SC) LDI ladder filter is studied. This study shows that using low sampling frequency with respect to the cutoff frequency reduces the HF error due to the reduction in amplifier gain. Design techniques are also given for the HF SC filters, such as double-sampling scheme, a low sampling frequency with an exact synthesis algorithm, as well a... View full abstract»

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  • Influences on soft error rates in static RAMs

    Publication Year: 1987, Page(s):430 - 436
    Cited by:  Papers (28)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1216 KB)

    Alpha-particle-induced soft error rates (SERs) in RAMs were measured by exposing commercial chips, with lid and protective coating removed, to an Americium-241 alpha source. These measurements have shown that, under normal operating conditions, resistive load SRAMs can be as sensitive as DRAMs. Measurements of variations of SER with cycle time and supply voltage were in broad agreement with a mode... View full abstract»

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  • A CMOS stereo 16-bit D/A converter for digital audio

    Publication Year: 1987, Page(s):390 - 395
    Cited by:  Papers (78)  |  Patents (73)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (872 KB)

    A complete monolithic stereo 16-bit D/A converter primarily intended for use in compact-disc players and digital audio tape recorders is described. The D/A converter achieves 16-bit resolution by using a code-conversion technique based upon oversampling and noise shaping. The band-limiting filters required for waveform smoothing and out-of-band noise reduction are included. Owing to the oversampli... View full abstract»

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  • Linearization of voltage-controlled oscillators using switched capacitor feedback

    Publication Year: 1987, Page(s):494 - 496
    Cited by:  Papers (16)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (488 KB)

    The voltage-frequency characteristics of any voltage-controlled oscillator can be linearized using a simple circuit containing a switched capacitor. The oscillation frequency becomes insensitive to power supply or temperature variations, and is determined only by the values of a capacitor, resistor, and the control voltage with respect to a reference voltage. View full abstract»

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  • A 2.5-ns, 40-mW, 4×4 GaAs multiplier in two's complement mode

    Publication Year: 1987, Page(s):409 - 414
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (976 KB)

    The design, fabrication, and testing of a very fast GaAs 4×4 parallel multiplier based on the modified Booth's algorithm are described. The multiplier includes novel transfer logic cells and is the first high-performance GaAs two's-complement multiplier. The circuit, fabricated with 1-μm aligned process, exhibits a multiplication time of 2.5 ns (typical 2.7 ns) on the critical path, with ... View full abstract»

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  • A CMOS potentiostat for amperometric chemical sensors

    Publication Year: 1987, Page(s):473 - 478
    Cited by:  Papers (82)  |  Patents (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1056 KB)

    A simple CMOS integrated potentiostatic control circuit is described. The circuit maintains a constant bias potential between the reference and working electrodes. Chemical concentration signals are converted amperometrically to an output voltage with a slope of approximately 60 mV/μA. Redox currents from 0.1 to 3.5 μA can be measured with a maximum nonlinearity of ±2% over this range... View full abstract»

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  • A simple integrated color indicator

    Publication Year: 1987, Page(s):350 - 356
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1048 KB)

    A simple integrated color sensor, suitable for providing a one-dimensional electrical output proportional to the color impression obtained from an observed scene, will in many applications be as effective as a high-density two-dimensional color imager. Such an all-silicon color sensor based on the strong wavelength dependence of the penetration depth of incident optical radiation in silicon is des... View full abstract»

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  • An expression for the propagation delay of a differential split-level (DSL) CMOS logic gate

    Publication Year: 1987, Page(s):457 - 459
    Cited by:  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (536 KB)

    The propagation delay of logic circuits are usually predicted with complex and time-consuming simulation programs. However, based on static analysis techniques, an expression for the propagation delay of a differential split-level CMOS logic gate has been derived. Variables in the expression are functions of geometrical, electrical, and technological parameters. Propagation delays calculated with ... View full abstract»

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  • Analog MOS integrated circuits-certain new ideas, trends, and obstacles

    Publication Year: 1987, Page(s):317 - 321
    Cited by:  Papers (36)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1040 KB)

    Possible directions for analog MOS IC research and development are discussed. Although many references to recent work are provided, no comprehensive review of the state of the art is attempted. Rather, the emphasis is selectively on certain current trends, as well as ideas that, in the opinion of the author, show promise for the future. A number of applications are considered, including artificial... View full abstract»

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  • A versatile CMOS linear transconductor/square-law function

    Publication Year: 1987, Page(s):366 - 377
    Cited by:  Papers (188)  |  Patents (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1832 KB)

    A simple CMOS circuit technique for realizing both linear transconductance and a precision square-law function is described. The circuit provides two separate outputs in the linear as well as square-law modes. The linear outputs both have a range of 100% or more of the total quiescent current value. The theory of operation is presented and effects of transistor nonidealities on the performance are... View full abstract»

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  • FEBRIS: a chip for pattern recognition

    Publication Year: 1987, Page(s):423 - 429
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1192 KB)

    A chip that performs and evaluates a 16×16-pixel comparison for application in pattern recognition systems is described. The on-chip data organization and the Wallace-tree evaluation circuits are described. The chip has been realized in a 2-μm NMOS process and operated at 18 MHz, thus performing four gigapixel operations per second. View full abstract»

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  • Design considerations of dense bipolar PLA's

    Publication Year: 1987, Page(s):488 - 491
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (776 KB)

    Technology issues and circuit choices are addressed and the tradeoffs between density and performance are discussed. It is concluded that device density is of key importance to the overall circuit design of a programmable logic array (PLA). A very dense PLA can be designed with its decoder implemented using merged transistor logic circuits and array crosspoints using butted-emitter transistor layo... View full abstract»

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  • A new on-chip converter for submicrometer high-density DRAMs

    Publication Year: 1987, Page(s):437 - 441
    Cited by:  Papers (23)  |  Patents (26)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (768 KB)

    The converter described is a feedback-type voltage regulator which supplies a reduced voltage to an entire RAM circuit. A novel timing activation method was introduced to save power. The converter has been implemented on an experimental 4-Mb dynamic RAM. It was found that an even faster access time and higher reliability compared to a conventional design could be achieved by using an on-chip volta... View full abstract»

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  • A high-speed digital filter LSI for video signal processing

    Publication Year: 1987, Page(s):396 - 402
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1312 KB)

    A ninth-order symmetrical filter has been developed for use in two-dimensional (2-D) processing in TV video systems, especially in high-definition TV receivers. A 2-D filter that is composed of only two types of LSIs (one-dimensional (1-D) digital filter LSI and delay-line) is discussed. The architecture of the digital filter LSI and circuit techniques are presented to obtain high-speed operation,... View full abstract»

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Aims & Scope

The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.

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Meet Our Editors

Editor-in-Chief

Jan Craninckx 
Imec
Kapeldreef 75
B-3001 Leuven, Belgium 
jssc.craninckx@gmail.com