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Solid-State Circuits, IEEE Journal of

Issue 3 • Date June 1987

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Displaying Results 1 - 25 of 38
  • [Inside front cover - June 1987]

    Publication Year: 1987 , Page(s): f2
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  • Table of contents (June 1987)

    Publication Year: 1987 , Page(s): 313 - 314
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  • Foreword (June 1987)

    Publication Year: 1987 , Page(s): 315
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  • Best Paper Award

    Publication Year: 1987 , Page(s): 316
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  • 5-Gbit/s Si integrated regenerative demultiplexer and decision circuit

    Publication Year: 1987 , Page(s): 385 - 389
    Cited by:  Papers (8)  |  Patents (3)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (966 KB)  

    A silicon bipolar circuit is presented which may be used as either a 1:2 demultiplexer or a decision circuit up to the bit rate of 5 Gb/s. The circuit was fabricated with a standard bipolar technology with oxide-wall isolation, 2-/spl mu/m emitter stripe widths, and a transit frequency of about 9 GHz at V/SUB CE/=1 V. The high-speed performance of the circuit was achieved by applying a double samp... View full abstract»

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  • Errata to "Analysis and Design Optimization of Domino CMOS Logic with Application to Standard Cells"

    Publication Year: 1987 , Page(s): 496
    Request Permissions | Click to expandAbstract | PDF file iconPDF (128 KB)  

    First Page of the Article
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  • Patent abstracts (June 1987)

    Publication Year: 1987 , Page(s): 497 - 500
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  • [Back inside cover - June 1987]

    Publication Year: 1987 , Page(s): b1
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  • A versatile CMOS linear transconductor/square-law function

    Publication Year: 1987 , Page(s): 366 - 377
    Cited by:  Papers (149)  |  Patents (15)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (1832 KB)  

    A simple CMOS circuit technique for realizing both linear transconductance and a precision square-law function is described. The circuit provides two separate outputs in the linear as well as square-law modes. The linear outputs both have a range of 100% or more of the total quiescent current value. The theory of operation is presented and effects of transistor nonidealities on the performance are... View full abstract»

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  • Implementation of a bipolar real-time image signal processor-RISP-II

    Publication Year: 1987 , Page(s): 403 - 408
    Cited by:  Papers (2)  |  Patents (2)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (1104 KB)  

    The high-speed digital image signal processor RISP-II, an improved version of the original real-time image signal processor (RISP) for gray-level image processing, is discussed. RISP-II has a microprogrammable architecture and a per-chip processing speed of 100 million instructions per second. Multichip processing has been realized by two added features: parallelism and pipelining. In the multichi... View full abstract»

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  • Precision compressor gain controller in CMOS technology

    Publication Year: 1987 , Page(s): 442 - 445
    Cited by:  Papers (4)  |  Patents (1)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (664 KB)  

    A precision gain-control compressor which makes use of a CMOS compatible lateral bipolar transistor is described. Two similar circuits are presented that enable raises to positive as well as negative powers. These circuits are specifically designed for use in CMOS hearing-aid systems. View full abstract»

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  • Analog MOS integrated circuits-certain new ideas, trends, and obstacles

    Publication Year: 1987 , Page(s): 317 - 321
    Cited by:  Papers (30)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (1040 KB)  

    Possible directions for analog MOS IC research and development are discussed. Although many references to recent work are provided, no comprehensive review of the state of the art is attempted. Rather, the emphasis is selectively on certain current trends, as well as ideas that, in the opinion of the author, show promise for the future. A number of applications are considered, including artificial... View full abstract»

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  • Noise optimization of switched-capacitor biquads

    Publication Year: 1987 , Page(s): 445 - 447
    Cited by:  Papers (6)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (520 KB)  

    Minimization of the switch noise level in switched-capacitor biquads is discussed. An analytical optimization procedure permits the designer to explore the different parameters in an expert way. A 20-kHz notch filter shows its feasibility. The signal-to-noise ratio is 90 dB and the chip area 1.0 mm/SUP 2/. View full abstract»

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  • Measurement and modeling of short-channel MOS transistor gate capacitances

    Publication Year: 1987 , Page(s): 464 - 472
    Cited by:  Papers (15)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (1360 KB)  

    A flexible electrometer method for measuring the gate capacitances of small-geometry MOS transistors is described. This technique applies to standard test transistors requiring any on-chip circuitry. Subfemtofarad accuracy and high resolution (better than 0.1 fF) have been achieved. This technique permits flexibility with regard to choices of DC biases and test devices and provides a good means of... View full abstract»

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  • FEBRIS: a chip for pattern recognition

    Publication Year: 1987 , Page(s): 423 - 429
    Cited by:  Papers (5)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (1192 KB)  

    A chip that performs and evaluates a 16×16-pixel comparison for application in pattern recognition systems is described. The on-chip data organization and the Wallace-tree evaluation circuits are described. The chip has been realized in a 2-μm NMOS process and operated at 18 MHz, thus performing four gigapixel operations per second. View full abstract»

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  • Very-low-drop voltage regulator with a fully complementary power process

    Publication Year: 1987 , Page(s): 447 - 450
    Cited by:  Papers (2)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (720 KB)  

    A very-low-drop voltage regulator is presented that uses an isolated-collector power p-n-p transistor structure to achieve an input-output voltage drop of 0.4 V at 1 A. The device includes a circuit which prevents quiescent current peaks when the p-n-p is in saturation and a Zener-zap trimmed reference makes possible ±1% output voltage tolerance. View full abstract»

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  • A CMOS potentiostat for amperometric chemical sensors

    Publication Year: 1987 , Page(s): 473 - 478
    Cited by:  Papers (50)  |  Patents (4)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (1056 KB)  

    A simple CMOS integrated potentiostatic control circuit is described. The circuit maintains a constant bias potential between the reference and working electrodes. Chemical concentration signals are converted amperometrically to an output voltage with a slope of approximately 60 mV/μA. Redox currents from 0.1 to 3.5 μA can be measured with a maximum nonlinearity of ±2% over this range... View full abstract»

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  • A CMOS stereo 16-bit D/A converter for digital audio

    Publication Year: 1987 , Page(s): 390 - 395
    Cited by:  Papers (65)  |  Patents (73)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (872 KB)  

    A complete monolithic stereo 16-bit D/A converter primarily intended for use in compact-disc players and digital audio tape recorders is described. The D/A converter achieves 16-bit resolution by using a code-conversion technique based upon oversampling and noise shaping. The band-limiting filters required for waveform smoothing and out-of-band noise reduction are included. Owing to the oversampli... View full abstract»

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  • Influences on soft error rates in static RAMs

    Publication Year: 1987 , Page(s): 430 - 436
    Cited by:  Papers (26)  |  Patents (5)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (1216 KB)  

    Alpha-particle-induced soft error rates (SERs) in RAMs were measured by exposing commercial chips, with lid and protective coating removed, to an Americium-241 alpha source. These measurements have shown that, under normal operating conditions, resistive load SRAMs can be as sensitive as DRAMs. Measurements of variations of SER with cycle time and supply voltage were in broad agreement with a mode... View full abstract»

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  • A four-state EEPROM using floating-gate memory cells

    Publication Year: 1987 , Page(s): 460 - 463
    Cited by:  Papers (21)  |  Patents (102)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (712 KB)  

    An electrically erasable programmable read-only memory (EEPROM) is used in a novel way as a four-state memory by charging the floating gate to determined values. The memory cell and the complete programming and readout circuit are described. Retention characteristics are investigated and found to confirm a thermionic emission model. Retention time is estimated to be more than 22 years at 125°C... View full abstract»

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  • 64×64-element photocurrent multiplexer for infrared staring array application

    Publication Year: 1987 , Page(s): 453 - 457
    Request Permissions | Click to expandAbstract | PDF file iconPDF (896 KB)  

    The design and operation of a 64×64 two-dimensional photocurrent multiplexer are described. The array is arranged on a 60-μm pitch. Direct-injection input is used from an IR photodiode array bump-bonded directly onto the top of the chip. Multiplexing is achieved using a MOSFET/CCD architecture with no column-transfer CCDs. The serial output is synchronized by means of line-sync and frame-... View full abstract»

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  • A 20-μW precision operational amplifier

    Publication Year: 1987 , Page(s): 322 - 329
    Cited by:  Patents (2)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (1328 KB)  

    A precision operational amplifier is described which draws 12 μA of quiescent current and can operate from a 1.6-V supply while requiring no external components such as the usual biasing resistor. The amplifier has DC characteristics comparable to the industry standard OP-07 and AC characteristics as good as currently available micropower devices. The circuit has an input voltage range and an o... View full abstract»

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  • New dynamic logic and memory circuit structures for BICMOS technologies

    Publication Year: 1987 , Page(s): 450 - 453
    Cited by:  Papers (3)  |  Patents (4)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (704 KB)  

    The basic structure is based on merging three devices in an area of a single MOS transistor. It uses an MOS capacitor and bipolar and JFET transistors for storage, writing, and sensing, respectively. These circuit structures have significantly smaller area and faster speed of operation compared to the conventional dynamic logic and memory circuits. In dynamic serial memory, the area of the circuit... View full abstract»

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  • Linearization of voltage-controlled oscillators using switched capacitor feedback

    Publication Year: 1987 , Page(s): 494 - 496
    Cited by:  Papers (14)  |  Patents (6)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (488 KB)  

    The voltage-frequency characteristics of any voltage-controlled oscillator can be linearized using a simple circuit containing a switched capacitor. The oscillation frequency becomes insensitive to power supply or temperature variations, and is determined only by the values of a capacitor, resistor, and the control voltage with respect to a reference voltage. View full abstract»

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  • Two-wire bridge-to-frequency converter

    Publication Year: 1987 , Page(s): 343 - 349
    Cited by:  Papers (19)  |  Patents (1)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (1216 KB)  

    An integrated two-wire bridge-to-frequency converter is presented for use as a remote-signal conditioner for sensor bridges such as strain-gauge bridges of platinum-wire temperature-sensing bridges. The converter has a sensitivity on the order of 1 Hz per 1-μV/V relative bridge output. A center frequency of 10 kHz allows the application of an untrimmed bridge with an imbalance up to ±100... View full abstract»

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Aims & Scope

The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Michael Flynn
University of Michigan