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IEEE Journal of Solid-State Circuits

Issue 1 • Feb. 1986

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Displaying Results 1 - 25 of 28
  • [Inside front cover - February 1986]

    Publication Year: 1986, Page(s): f2
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  • Table of contents (February 1986)

    Publication Year: 1986, Page(s):1 - 2
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  • Foreword (February 1986)

    Publication Year: 1986, Page(s):3 - 5
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  • Patent abstracts (February 1986)

    Publication Year: 1986, Page(s):199 - 204
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  • IEEE copyright form

    Publication Year: 1986, Page(s):207 - 208
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  • [Back inside cover - February 1986]

    Publication Year: 1986, Page(s): b1
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  • A digital signal-processing codec filter for PCM applications

    Publication Year: 1986, Page(s):175 - 181
    Cited by:  Papers (8)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (992 KB)

    A programmable signal-processing codec filter (SICOFI) which performs its main filter functions by means of digital signal processing (DSP) is described. Besides PCM coding and band limitation, the circuit provides programmable adjustment of level control, impedance matching, hybrid balancing, and frequency response correction. Circuit performance, chip area, and power consumption have been optimi... View full abstract»

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  • Observation of latch-up phenomena in CMOS ICs by means of digital differential voltage contrast

    Publication Year: 1986, Page(s):169 - 174
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (896 KB)

    The latch-up phenomenon in CMOS ICs is studied by means of a SEM observation technique that is based on capacitively coupled voltage contrast and is characterized by digital beam control and image acquisition. Passivated devices are studied at low beam energies, without interfering with their electrical behavior. The comparison between images taken in the latched and nonlatched state allows reliab... View full abstract»

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  • Hot-carrier generation in submicrometer VLSI environment

    Publication Year: 1986, Page(s):187 - 192
    Cited by:  Papers (37)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (712 KB)

    Submicrometer MOSFETs may suffer from reliability degradation, which has a strong correlation with substrate current. In order to know what is happening to substrate current in a VLSI environment, a substrate-current circuit simulator is developed. The simulator is applied to MOS unit circuit blocks, VLSI static memories, and dynamic memories, and their hot-carrier duty ratios are calculated. A ne... View full abstract»

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  • Realization of quaternary logic circuits by n-channel MOS devices

    Publication Year: 1986, Page(s):162 - 168
    Cited by:  Papers (40)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (984 KB)

    A method to implement quaternary circuits using NMOS devices is proposed. The authors have designed a simplified elementary form of inverter and have implemented a series of fundamental logic and memory circuits. These circuits comprise MOS transistors with three values of enhancement-mode threshold voltage and one depletion-mode threshold voltage. The features of these circuits are a small number... View full abstract»

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  • A systolic SBNR adaptive signal processor

    Publication Year: 1986, Page(s):120 - 128
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (824 KB)

    A new realization for adaptive signal processing units is proposed which uses a special subset of signed-digit number representations (SDNRs). This signed binary number representation (SBNR) captures all of the efficiencies of SDNR arithmetic and, in addition makes circuit realizations less complex. Furthermore, a natural interface between analog and digital numbers is provided. The serial online ... View full abstract»

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  • Architectures for VLSI implementation of movement-compensated video processors

    Publication Year: 1986, Page(s):140 - 149
    Cited by:  Papers (1)  |  Patents (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1080 KB)

    Architecture elements suitable for VLSI implementation and real-time operation in movement-compensated video (MCV) processors are presented. The algorithm used in the video processor is based on motion estimation and compensation techniques. An overview of the algorithm is given with emphasis placed on one of the key functions used in the prediction, the two-dimensional interpolator. A VLSI implem... View full abstract»

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  • A GaAs data switching IC for a gigabits per second communication system

    Publication Year: 1986, Page(s):157 - 161
    Cited by:  Papers (12)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (752 KB)

    A GaAs monolithic 4×4 switching circuit has been developed for high-speed digital communication systems. This switching IC, which has built-in address decoders, is completely ECL-compatible. Dynamic performance measurements on the chip mounted in a 32-pin flat package prove that it correctly switches pseudorandom data transmitted at more than 2 Gb/s, switching in 1 ns. The pulsewidth variati... View full abstract»

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  • A second-generation digital signal processor

    Publication Year: 1986, Page(s):86 - 91
    Cited by:  Papers (3)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (872 KB)

    The architecture, implementation, and applications of the TMS32020, a second-generation VLSI digital signal processor, are described. The processor has many special features which provide a significant advance over previous VLSI digital signal processors. Its multiprocessor capabilities further distinguish it, allowing for much more flexibility in overall system design. The architecture of the dev... View full abstract»

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  • A 160-kb/s digital subscriber loop transceiver with memory compensation echo canceller

    Publication Year: 1986, Page(s):65 - 72
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1320 KB)

    A full-duplex transceiver chip incorporating an adaptive echo canceling modem and a 2.048-Mb/s serial interface is described. The device provides a full-duplex communication link at 160 or 80 kb/s on up to 4 or 5 km, respectively, of 0.5-mm twisted-pair cable. Full integration is achieved through the use of RAM-based sign-algorithm echo-cancellation, biphase line code, a fixed switched-capacitor e... View full abstract»

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  • Integrated 18th-order pseudo-N-path filter in VIS-SC technique

    Publication Year: 1986, Page(s):48 - 56
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1112 KB)

    An integrated 18th-order frequency symmetrical switched-capacitor (SC) bandpass filter is described that was realized by the use of voltage inverter switches (VISs) in the form of recharging devices. The filter was implemented in a standard CMOS technology. It was conceived for use as a `channel filter' in modulation schemes for PCM/FDM and audio/FDM conversion. Starting from a high-pass filter as... View full abstract»

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  • Adaptive filters suitable for real-time spectral analysis

    Publication Year: 1986, Page(s):108 - 119
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1344 KB)

    New cascade structures for adaptive filters are presented. They are especially suitable for real-time applications. Since the new structures are intended to be realized using single-chip DSP ICs or single-chip custom VLSI circuits, the requirements for memory and divisions are minimized. The new structures are based on state-variable biquads that in addition to having good SNRs and low sensitiviti... View full abstract»

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  • Selective linear phase switched-capacitor filters modelled on classical structures

    Publication Year: 1986, Page(s):31 - 39
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB)

    Exact analytic techniques are given for the design of strays-insensitive lossless discrete integrator (LDI) switched-capacitor low-pass and high-pass filters, with phase linearity taken into consideration. An improved synthesis algorithm is also presented for the low-pass case. The given solutions appear for the first time in relation to switched-capacitor filters, but they rely on classical techn... View full abstract»

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  • A TDI charge-coupled imaging device for page scanning

    Publication Year: 1986, Page(s):182 - 186
    Cited by:  Papers (4)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (768 KB)

    An experimental 2048×32-stage time-delay and integration (TDI) charge-coupled imaging device has been designed, fabricated, and operated. It is designed for high-speed, low-noise, full-page document imaging with moderate illumination. An overview is presented of its design and performance, detailing unusual design features. These include a photocharge capacity of 3.5 million electrons per pe... View full abstract»

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  • The defect-sensitivity effect of memory chips

    Publication Year: 1986, Page(s):193 - 198
    Cited by:  Papers (16)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (616 KB)

    Three effects appear to influence the yield of digital memory chips. In the first effect, yields appear to decrease faster with chip area than is predicted with simple yield models. Although this effect has been described briefly before, more supporting data are given and the applicable yield models are derived from these data. The second effect suggests that the random-defect yield for a chip doe... View full abstract»

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  • VLSI implementation of two-dimensional digital filters via two-dimensional filter chips

    Publication Year: 1986, Page(s):129 - 139
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (984 KB)

    The realization of an arbitrary two-dimensional (2-D) rational transfer function which represents an infinite impulse response (IIR) 2-D filter in terms of low-order 2-D polynomials is discussed. These low-order polynomials are implemented via a bit-sliced chip, and are used as standard building blocks for the implementation of the general 2-D digital filter. Different general realization methods ... View full abstract»

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  • Power distribution techniques for VLSI circuits

    Publication Year: 1986, Page(s):150 - 156
    Cited by:  Papers (47)  |  Patents (76)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (872 KB)

    The onchip power distribution problem for highly scaled technologies is investigated. Metal migration and line resistance problems as well as ways to optimize multilayer metal technology for low resistance, low current density, and maximum wirability are also investigated. Fundamental lower limits and the limiting factors of the power-line current density and the voltage drop are studied. Tradeoff... View full abstract»

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  • Custom design of a VLSI PCM-FDM transmultiplexer from system specifications to circuit layout using a computer-aided design system

    Publication Year: 1986, Page(s):73 - 85
    Cited by:  Papers (46)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1784 KB)

    The computer-aided design of a VLSI PCM-FDM transmultiplexer is presented. The entire design process, from system specifications to integrated circuit layout, is carried out with the aid of specialized computer programs for the analysis, synthesis, and optimization at each design level: the filter network, the architecture, and the circuit layout. These CAD tools support a top-down custom design m... View full abstract»

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  • A scalable high-performance switched-capacitor filter

    Publication Year: 1986, Page(s):57 - 64
    Cited by:  Papers (22)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1440 KB)

    Switched-capacitor filters tend to display reduced performance when implemented at reduced feature size because of higher KT/C and 1/f noise, and reduced operational amplifier gain and swing. Descriptions are given of circuit solutions to certain performance degradations associated with technology scaling, including chopper stabilization, and class AB differential operational amplifier architectur... View full abstract»

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  • Power consumption versus filter topology in SC filters

    Publication Year: 1986, Page(s):40 - 47
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (880 KB)

    One of the major problems in biomedical and other signal processing circuit designs is the reduction of power consumption. If the amplifiers of a switched-capacitor (SC) filter are coupled together in one of the clock phases, then they have much higher gain-bandwidth requirements than in an uncoupled configuration. This results in a more than proportional increase in power consumption. Two formali... View full abstract»

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Aims & Scope

The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.

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Editor-in-Chief

Jan Craninckx 
Imec
Kapeldreef 75
B-3001 Leuven, Belgium 
jssc.craninckx@gmail.com