By Topic

Solid-State Circuits, IEEE Journal of

Issue 6 • Date Dec. 1980

Filter Results

Displaying Results 1 - 25 of 31
  • [Inside front cover - December 1980]

    Publication Year: 1980 , Page(s): f2
    Save to Project icon | Request Permissions | PDF file iconPDF (110 KB)  
    Freely Available from IEEE
  • 1980 Index IEEE Journal of Solid-State Circuits Vol. SC-15

    Publication Year: 1980 , Page(s): i1 - i13
    Save to Project icon | Request Permissions | PDF file iconPDF (1999 KB)  
    Freely Available from IEEE
  • Table of contents (December 1980)

    Publication Year: 1980 , Page(s): 917
    Save to Project icon | Request Permissions | PDF file iconPDF (72 KB)  
    Freely Available from IEEE
  • Editor's Note (December 1980)

    Publication Year: 1980 , Page(s): 918
    Save to Project icon | Request Permissions | PDF file iconPDF (49 KB)  
    Freely Available from IEEE
  • Foreword [to the Special Issue]

    Publication Year: 1980 , Page(s): 919 - 920
    Save to Project icon | Request Permissions | PDF file iconPDF (310 KB)  
    Freely Available from IEEE
  • A process-insensitive high-performance NMOS operational amplifier

    Publication Year: 1980 , Page(s): 921 - 928
    Cited by:  Papers (21)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1111 KB)  

    A new high-performance NMOS operational amplifier is described which has been fabricated using a standard n-channel enhancement-depletion MOS process. A new input stage, employing common-mode feedback, is presented that reduces the circuit's sensitivity to process variations. The compensation of MOS cascade stages is examined and a simple improvement is shown to dramatically reduce the total compe... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A high performance low power CMOS channel filter

    Publication Year: 1980 , Page(s): 929 - 938
    Cited by:  Papers (66)  |  Patents (12)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1543 KB)  

    A new CMOS PCM channel filter is described, which includes transmit and receive filters on a single die. This chip displays an idle-channel noise of typically 0 dBrnC0, a power supply rejection ratio of 40-50 dB at 1 kHz, and a fully operational power dissipation of only 35 mW, making it very cost effective in telecommunication switching systems. The design of this chip, including architectural, s... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A multiplexed switched capacitor filter bank

    Publication Year: 1980 , Page(s): 939 - 945
    Cited by:  Papers (22)  |  Patents (10)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1470 KB)  

    A technique is introduced which allows several integrator capacitors to be multiplexed onto a single operational amplifier. As a result, the op amp can be shared by several switched capacitor filter channels, drastically reducing the number of op amps required for filter banks. Twenty second-order filters have been implemented in a circuit using only two op amps and 2.5 mm/SUP 2/. The design of th... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A precision autozeroing sample and hold integrated circuit

    Publication Year: 1980 , Page(s): 945 - 949
    Cited by:  Patents (3)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (577 KB)  

    A precision sample and hold integrated circuit with autozeroing of all DC errors is described. Experimental data have shown that it provides the accuracy necessary for use in 12 bit data acquisition systems. Application of noise-optimized silicon gate FET devices for the input circuitry of amplifiers which buffer the hold capacitor results in a low droop rate and allows the sample/hold to operate ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A fast, latching comparator for 12 bit A/D applications

    Publication Year: 1980 , Page(s): 949 - 954
    Cited by:  Papers (2)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (912 KB)  

    High-speed, 12 bit accurate successive approximation A/D converters demand a comparator with both excellent input specifications and fast response time. The author describes a voltage comparator with 50 ns response time to 1/2 LSB overdrive (1.2 mV) and 0.1 LSB (250 /spl mu/V) total input error. Unique features of the circuit include a super-/spl beta/ input stage, a fast buried-zener level-shift,... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A volume and frequency response control IC for audio

    Publication Year: 1980 , Page(s): 968 - 971
    Cited by:  Papers (2)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (819 KB)  

    A dual channel DC controllable tone, volume, and balance control IC is described. A novel variable response filter, combined with a time constant control technique, makes it possible to integrate all functions into a 16-pin package. The chip, requiring very few external components, has an 80 dB gain controlling range and less than 0.2 percent total harmonic distortion. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A real-time programmable switched-capacitor filter

    Publication Year: 1980 , Page(s): 972 - 977
    Cited by:  Papers (14)  |  Patents (5)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (850 KB)  

    Four independent real-time programmable switched-capacitor filters have been fabricated on a single NMOS chip. The filters are second-order sections with digitally programmable Q and center frequency. Either low-pass or bandpass functions are available by selecting the appropriate input. The device is microprocessor compatible and includes permanent programming capability as well as an on-chip osc... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An integrated real-time programmable transversal filter

    Publication Year: 1980 , Page(s): 978 - 983
    Cited by:  Papers (9)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1284 KB)  

    Implementation, measurements, and characteristics of a fully integrated 32 tap real-time programmable transversal filter, which facilitates a number of filter applications, are discussed. It uses RAMs and 16 MDACs for tap weight programming and pipe organ structure to provide for a large variety of adaptive convolutional and correlative signal processing with optimum compromise among power dissipa... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A general purpose 1024-stage electronically programmable transversal filter

    Publication Year: 1980 , Page(s): 984 - 996
    Cited by:  Papers (13)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (2872 KB)  

    The architecture, design, and performance of a filter implemented in CCD/NMOS technology is described. The device features programmability of the reference signal, the filter length, and weighting coefficient resolution. Off-chip circuitry is minimized by incorporating both analog and digital support circuitry, such as clock logic, drivers, amplifiers, and microprocessor interface circuitry on chi... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A low-power NMOS transmit/receive IC filter for PCM telephony

    Publication Year: 1980 , Page(s): 997 - 1005
    Cited by:  Papers (5)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1302 KB)  

    A very low-power single chip NMOS implementation of the transmit and receive PCM filters used in telephony applications is described. The circuit utilizes doubly-terminated switched capacitor low-pass and high-pass filters and meets accepted requirements without trimming. The filters have low idle-channel noise, consume only 20 mW of power, and are realized in a small area of silicon. Design of th... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A precision low-power PCM channel filter with on-chip power supply regulation

    Publication Year: 1980 , Page(s): 1005 - 1013
    Cited by:  Papers (8)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1132 KB)  

    A single chip PCM channel filter with improved overall performance characteristics is described. The most important characteristics are power dissipation, idle channel noise, and power supply rejection. The filter described uses switched capacitor techniques and contains two fifth-order low-pass filters, a 50/60 Hz rejection filter, internal anti-alias filters, and a 600 ohm line driver. The filte... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An interpolative PCM CODEC with multiplexed digital filters

    Publication Year: 1980 , Page(s): 1014 - 1021
    Cited by:  Papers (7)  |  Patents (5)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1464 KB)  

    An LSI CODEC, an LSI multiplexed digital filter, and an LSI compandor are developed for telephone PCM AD/DA conversion. The total chip count is 1.56 chips per channel. The single-chip interpolative CODEC operates at a 32 kHz sampling rate with a 12-bit linear code input/output, and is implemented in a phosphorus buried emitter IIL process without the need for component value trimming. The digital ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A versatile bipolar monolithic 6-bit A/D converter for 100 MHz sample frequency

    Publication Year: 1980 , Page(s): 1030 - 1032
    Cited by:  Papers (9)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (640 KB)  

    An A/D converter was developed which uses a parallel conversion technique and is designed for manufacture with an ASBC process. The converter SDA 5010 is suitable for a wide range of applications because of its high-conversion rate, its low-power dissipation of 450 mW, large analog input range of up to /spl plusmn/2.5 V, and an overflow output for systems where a higher accuracy than 6 bits is req... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An 8-bit, 5 ns monolithic D/A converter subsystem

    Publication Year: 1980 , Page(s): 1033 - 1039
    Cited by:  Papers (21)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1191 KB)  

    Describes a 5 ns settling time digital-to-analog converter device, which has been designed for use in video speed successive approximation analog to digital converters. The chip includes a precision reference source with a 25 ppm per degree C average temperature coefficient and a high-speed comparator. The successive approximation approach, restricted to low-speed converters until now, has the adv... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An eight-channel 8 bit microprocessor compatible NMOS D/A converter with programmable scaling

    Publication Year: 1980 , Page(s): 1051 - 1059
    Cited by:  Papers (18)  |  Patents (7)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1318 KB)  

    A single-chip multiple-channel D/A converter is described. The NMOS chip contains a combination of digital and analog functions. Eight output channels with 8 bit accuracy are provided and each channel has programmable end points. The values for the data and the end points are stored in an internal RAM. Sample and-hold functions are completely on-chip. Only one multiplexed opamp is required for the... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A complete single-supply microprocessor-compatible 8-bit DAC

    Publication Year: 1980 , Page(s): 1059 - 1070
    Cited by:  Papers (4)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1493 KB)  

    A functionally complete, microprocessor-compatible digital-to-analog converter which operates on a single +5 V supply is described. This monolithic bipolar chip is fabricated using a linear compatible I/SUP 2/L process and contains both a precision reference and a voltage output buffer, along with the DAC and input logic. Laser wafer trimming of on-chip thin-film resistors is used to guarantee out... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • 5 V temperature regulated voltage reference

    Publication Year: 1980 , Page(s): 1070 - 1076
    Cited by:  Papers (4)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (793 KB)  

    A 5 V internally temperature regulated voltage reference integrated circuit, which achieves 0.3 ppm//spl deg/C TC over the temperature range -55/spl deg/C to 125/spl deg/C, is described. It is built using a buried zener reference in a dielectrically isolated complementary bipolar process which employs laser trimmed NiCr thin film resistors and a high thermal resistance epoxy die attach. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Accurate analysis of temperature effects in I/SUB c/V/SUB BE/ characteristics with application to bandgap reference sources

    Publication Year: 1980 , Page(s): 1076 - 1084
    Cited by:  Papers (68)  |  Patents (7)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (957 KB)  

    The inaccuracy of the analyses commonly used for predicting the temperature behavior of the I/SUB C/-V/SUB BE/ characteristics of transistors and the output of bandgap reference sources is pointed out. The problem is traced to a basic assumption implicit in such analyses, namely that the variation of the bandgap voltage of silicon with temperature is linear; this assumption is shown to be of poor ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An accurate small-range IC temperature transducer

    Publication Year: 1980 , Page(s): 1089 - 1091
    Cited by:  Papers (3)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (353 KB)  

    A new IC temperature transducer is described. Main features are: easy calibration, high-output voltage (100 mV//spl deg/C), low-output impedance (70 /spl Omega/), high accuracy (/spl plusmn/0.1/spl deg/C; 20-50/spl deg/C) and low-power dissipation (250 /spl mu/W). The new device, which uses the intrinsic bandgap voltage of silicon as a reference, is especially suited to clinical use. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • [Back inside cover - December 1980]

    Publication Year: 1980 , Page(s): b1
    Save to Project icon | Request Permissions | PDF file iconPDF (102 KB)  
    Freely Available from IEEE

Aims & Scope

The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Michael Flynn
University of Michigan