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IEEE Journal of Solid-State Circuits

Issue 3 • Date June 1978

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Displaying Results 1 - 25 of 30
  • [Inside front cover - June 1978]

    Publication Year: 1978, Page(s): f2
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    Freely Available from IEEE
  • Table of contents (June 1978)

    Publication Year: 1978, Page(s): 281
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  • Introduction from the Third European Solid-State Circuits Conference Organizing Committee

    Publication Year: 1978, Page(s): 282
    Cited by:  Patents (6)
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  • Foreword (June 1978)

    Publication Year: 1978, Page(s):283 - 284
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  • A 1 mV MOS comparator

    Publication Year: 1978, Page(s):294 - 297
    Cited by:  Papers (35)  |  Patents (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (679 KB)

    An MOS comparator circuit capable of detecting difference signals as low as 1 mV in 3 /spl mu/s has been designed, built, and tested. The circuit does not require high accuracy components or tight control of device parameter tolerances. View full abstract»

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  • A fully integrated five-gyrator filter at video frequencies

    Publication Year: 1978, Page(s):303 - 307
    Cited by:  Papers (10)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (742 KB)

    An experimental single-chip silicon integrated-circuit filter is described for use in color television receivers. It comprises five gyrator resonators operating in the range 4-6 MHz. This chip provides all the selectivity required to separate the sound, luminance, and chrominance components from the composite video signal, and is tuned by a single bias potential applied to the p-n junction capacit... View full abstract»

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  • A 64-kbit dynamic MOS RAM

    Publication Year: 1978, Page(s):333 - 338
    Cited by:  Papers (17)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (774 KB)

    A 64-kbit dynamic MOS RAM is developed by using 2 /spl mu/m rule VLSI fabrication technology and low power circuit technology. The 2 /spl mu/m rule VLSI fabrication technology is achieved by improving various aspects of the ultraviolet photolithographic, thin-gate oxidation, arsenic ion implantation, and multilevel interconnection processes. Microminiaturization of the device structure has made th... View full abstract»

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  • Wafer-scale integration-a fault-tolerant procedure

    Publication Year: 1978, Page(s):339 - 344
    Cited by:  Papers (69)  |  Patents (37)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (815 KB)

    Considers a new approach to full-slice technology in relation to existing procedures for achieving this goal. Under external control a chain of good chips is created to form a long serial memory from an array of identical chips on a full slice. Bad chips are automatically bypassed without requiring any pre- or post-programming of the metallization and without any prior knowledge of the distributio... View full abstract»

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  • A new circuit configuration for a static memory cell with an area of 880 /spl mu/m/sup 2/

    Publication Year: 1978, Page(s):345 - 351
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (888 KB)

    A new 5-transistor memory cell in double polysilicon technology with depletion-load elements and a minimum linewidth of 3 /spl mu/m is presented. The circuit configuration, based on a Schmitt trigger, leads to static memory cells having a bit density of 1100 bit/mm/SUP 2/ and an average power consumption of 5.5 /spl mu/W/cell. With the help of computer simulations the static and dynamic behavior o... View full abstract»

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  • A novel high-speed interface circuit saving wiring equipment

    Publication Year: 1978, Page(s):351 - 355
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (704 KB)

    A high-speed integrated interface circuit is described, which is capable of transmitting and receiving full duplex digital signals on a twisted pair line. Thus two independent messages may be transmitted on one line at the same time. A push-pull transmitter and a differential amplifier as receiver provide a common-mode rejection of more than 1 V in either the positive or negative direction. Output... View full abstract»

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  • A nonvolatile eight-bit asynchronous counter and its applications

    Publication Year: 1978, Page(s):355 - 362
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (962 KB)

    This paper is concerned with an interesting application of p-channel MNOS on silicon-on-sapphire (SOS) technology: a nonvolatile eight-bit asynchronous counter. This circuit has two count modes: binary and decimal (or BCD). It is fully TTL compatible and needs two power supplies: V/SUB CC/=+5 V/spl plusmn/5 percent and V/SUB DD/=-12 V to -35 V. Maximum count frequency is 1 MHz. Data storage necess... View full abstract»

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  • A new SCCD specific measurement technique to determine the effective fast interface state density

    Publication Year: 1978, Page(s):366 - 368
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (361 KB)

    Taking into account the thermally generated minority carriers to determine the background charge level along a SCCD, a measurement technique is described to obtain an effective fast interface state density N/SUB SSeff/. Compared to other SCCD specific methods the authors achieve better accuracy. The measurement technique is simple to apply and is useful to determine very small values of N/SUB SSef... View full abstract»

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  • A high precision monolithic current follower

    Publication Year: 1978, Page(s):371 - 373
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (408 KB)

    A monolithic bipolar current follower has been developed which can be used in conjunction with commercially available voltage followers to realize a number of electronic functions. It features an output-input resistance ratio R/SUB o//R/SUB i/ of 10/SUP 6/, a 0.2 percent gain accuracy and a 42 MHz bandwidth. View full abstract»

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  • A high-voltage circuit for driving liquid-crystal displays

    Publication Year: 1978, Page(s):375 - 378
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (836 KB)

    A circuit which can be used as a driver for large multiplexed liquid-crystal displays is described. The electrical REQUIREMENTS FROM SUCH A CIRCUIT ARE DISCUSSED and a technology defined to meet these requirements. The technology is compatible with standard CMOS on SOS processing. The actual performance of this circuit is then described. The drain breakdown voltage of individual transistors exceed... View full abstract»

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  • ANDREI-a minicomputer nonlinear analysis program for integrated circuits

    Publication Year: 1978, Page(s):380 - 383
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (395 KB)

    A circuit analysis program, ANDREI, has been developed which can be run on a 32K 16-bit word minicomputer with a disk unit. A novel virtual storage scheme is used to save internal memory required by large arrays. The nonlinear DC and transient and small-signal AC analyses of circuits up to 150 nodes and 150 elements can be performed in the present version. Semiconductor device models for diodes, b... View full abstract»

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  • A modular, high-speed serial pipeline multiplier for digital signal processing

    Publication Year: 1978, Page(s):400 - 408
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1476 KB)

    Describes the design and implementation of a 44 Mbit/s serial pipeline multiplier that exploits an efficient algorithm with a novel circuit architecture. The multiplier, intended for use with signed-magnitude coefficients and two's complement data of arbitrary length, produces products automatically rounded and truncated to the same length as incoming data. The circuit's design focuses on the bit-... View full abstract»

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  • Wide-band pulse amplifier

    Publication Year: 1978, Page(s):409 - 411
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (535 KB)

    In order to build a gigabit/second pulse amplifier for medium power applications a new transistor-distributed amplifier configuration was developed and tested. A five-section amplifier employing 5 GHz f/SUB T/ bipolar transistors has a frequency response from DC to 3.6 GHz. Results achieved were a 10 dB gain, 130 ps step response rise time, and a amplitude of 4 V peak to peak across a 50 /spl Omeg... View full abstract»

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  • An integrable precision voltage-to-current converter with bilateral capability

    Publication Year: 1978, Page(s):411 - 413
    Cited by:  Papers (3)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (532 KB)

    A simple, integrable, unilateral or bilateral voltage-to-current converter is presented. Very linear and accurate conversions have been measured for voltage ranging from 0 to more than 10 V. The signal paths do not include any lateral p-n-p transistors, offering potentially wide-band applications. View full abstract»

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  • [Back inside cover - June 1978]

    Publication Year: 1978, Page(s): b1
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    Freely Available from IEEE
  • Dynamic testing of high-speed A/D converters

    Publication Year: 1978, Page(s):368 - 371
    Cited by:  Papers (10)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB)

    The proposed digital techniques determine the transfer characteristics of A/D converters under dynamic operating conditions. Characteristic parameters are derived from the digital outputs of converters. Measurements show the discrepancy between static and dynamic performances. View full abstract»

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  • Quantitative measurement with high time resolution of internal waveforms on MOS RAMs using a modified scanning electron microscope

    Publication Year: 1978, Page(s):319 - 325
    Cited by:  Papers (14)  |  Patents (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1016 KB)

    The growing packing density of integrated circuits calls, to an increasing extent, for the testing of the functioning of the individual circuits of ICs. If a mechanical prober is used for this purpose, the resulting capacitive loading of the circuit is liable to alter its performance. It is shown in the present work that the electron beam represents an ideal nonloading and nondestructive probe whi... View full abstract»

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  • Position sensitive light detectors with high linearity

    Publication Year: 1978, Page(s):392 - 399
    Cited by:  Papers (39)  |  Patents (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (800 KB)

    The position linearity of position sensitive light detectors (PSD) of various designs was investigated. It was shown that existing detectors suffered from inherent nonlinearities. The maximum distortion was in the range of 35-40 percent within the center 64 percent of the active area. Design and fabrication of a detector with extremely high position linearity was described. By using a double-sided... View full abstract»

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  • Nonuniform pulse code modulation encoder using double polysilicon technology

    Publication Year: 1978, Page(s):298 - 302
    Cited by:  Papers (4)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (608 KB)

    A new scheme for an A-law PCM encoder is presented. It is based on charge redistribution in a single array of 11 binary weighted capacitors. Use is made of a double polysilicon n-MOS process which is compatible with advanced integrated filter techniques such as CCDs or active LSI filters with ratioed capacitors. No operational amplifier is needed, enabling low power dissipation and standard supply... View full abstract»

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  • Potential of MOS technologies for analog integrated circuits

    Publication Year: 1978, Page(s):285 - 294
    Cited by:  Papers (53)  |  Patents (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1400 KB)

    Reviews the rapid progress in MOS analog circuit techniques over the past three years, and attempts to estimate the near-term attainable characteristics of MOS LSI circuits which incorporate both analog and digital functions. View full abstract»

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  • Cross point array with bipolar monolithic integrated ON-attenuation compensated crosspoints

    Publication Year: 1978, Page(s):373 - 375
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (456 KB)

    Deals with a novel crosspoint array with bipolar monolithic integrated ON-attenuation compensated crosspoints, i.e., bidirectional amplifying crosspoints for space-division PABXs. Properties of the crosspoints are described in detail. The array is realized with the aid of an I/SUP 2/L-crosspoint array for switching and control. View full abstract»

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Aims & Scope

The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief

Jan Craninckx 
Imec
Kapeldreef 75
B-3001 Leuven, Belgium 
jssc.craninckx@gmail.com