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Solid-State Circuits, IEEE Journal of

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Solid-State Circuits, IEEE Journal of

Issue 2 • Date April 1977

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[Back inside cover - April 1977]

Table of contents (April 1977)

Editor's Notice (April 1977)

Foreword: Special Issue on Integrated Injection Logic

Second generation I/sup 2/L/MTL: a 20 ns process/structure

I/sup 2/L with a self-aligned double-diffused injector

A new high speed I/sup 2/L structure

The Schottky I/sup 2/L technology and its application in a 24x9 sequential access memory

Schottky I/sup 2/L (substrate fed logic) - An optimum form of I/sup 2/L

Schottky I/sup 2/L (substrate fed logic) - An analysis of the implications of the vertical injector structure and Schottky collection

Polycrystalline silicon as a diffusion source and interconnect layer in I/sup 2/L realizations

I/sup 2/L timing circuit for the 1 ms-10 s range

Base current of I/sup 2/L transistors

Modeling device and layout effects of performance driven I/sup 2/L

Modeling the dynamic behavior of I/sup 2/L

A stored charge model for estimating I/sup 2/L gate delay

Dynamic behavior of active charge in I/sup 2/L transistors calculated with lumped transistor models

Role of the external n-p-n base region on the switching speed of integrated injection logic (I/sup 2/L)

An analytic model for the design and optimization of ion-implanted I/sup 2/L devices

Computer-aided design of large-scale integrated I/sup 2/L logic circuits

Evaluation of electron injection current density in p-layers for injection modeling of I/sup 2/L

I/sup 2/L current gain design

I/sup 2/L DC functional requirements

Stacked I/sup 2/L circuit

Isoplanar integrated injection logic: a high-performance bipolar technology

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