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# IEEE Journal of Solid-State Circuits

## Filter Results

Displaying Results 1 - 18 of 18
• ### [Front cover - August 1969]

Publication Year: 1969, Page(s): f1
| PDF (33 KB)
• ### [Inside front cover - August 1969]

Publication Year: 1969, Page(s): f2
| PDF (81 KB)
• ### Editor's Notice (August 1969)

Publication Year: 1969, Page(s): 181
| PDF (23 KB)
• ### Foreword (August 1969)

Publication Year: 1969, Page(s):182 - 183
| PDF (213 KB)
• ### A highly efficient inductorless voltage regulator

Publication Year: 1969, Page(s):192 - 195
Cited by:  Papers (1)
| | PDF (433 KB)

This versatile and highly efficient voltage regulator, for applications where the conventional series regulator and the inductor type of switching regulator are impractical, uses solid-state switching techniques. Efficiencies greater than 90 percent have been achieved, independent of input voltage amplitudes. Good load regulation is provided, with a ripple increase as the main effect of a load-cur... View full abstract»

• ### Wide-band network characterization by Fourier transformation of time-domain measurements

Publication Year: 1969, Page(s):231 - 235
Cited by:  Papers (7)  |  Patents (11)
| | PDF (759 KB)

A novel method of measuring driving-point and transfer impedance over a wide spectrum rapidly and with good accuracy uses a digital computer to transform the pulse response of a network into the frequency domain. A sampling oscilloscope provides the time transformation needed for data acquisition. The method and laboratory technique are discussed. Experimental data show agreement within 12 percent... View full abstract»

• ### A triple-channel micropower operational amplifier

Publication Year: 1969, Page(s):236 - 240
Cited by:  Papers (2)
| | PDF (781 KB)

One method of increasing the amount of circuit functions using bipolar devices is to simplify the design of the monolithic chip. This paper describes such a new integrated circuit. The circuit has three independent, micropower, high- gain operational amplifiers on the monolithic chip. Open-loop voltage gain as high as 100 dB has been achieved with a power dissipation of under 300 /spl mu/W. The ga... View full abstract»

• ### An amplifier with bipolar transistors and extremely high input impedance

Publication Year: 1969, Page(s):243 - 244
| | PDF (298 KB)

A differential amplifier with unity gain, less than 10 to 50 mV offset, and a dc input resistance of 900 M/spl Omega/ was examined using complementary bipolar transistors. View full abstract»

• ### A new mode of operation-a controlled monostable tunnel-diode circuit

Publication Year: 1969, Page(s):244 - 249
| | PDF (876 KB)

A new mode of operation of a tunnel-diode pair circuit has been developed and theory and circuit design are presented. Operation principles are discussed for damped-oscillation mode, unbalanced mode, and balanced mode with overdamping. Since the circuit has a high degree of freedom, several applications are possible, for example, as an inverter, pulse shaper, quasi-stable memory, and time-to-pulse... View full abstract»

• ### Contributors (August 1969)

Publication Year: 1969, Page(s):252 - 254
| PDF (599 KB)
• ### Super-gain transistors for IC's

Publication Year: 1969, Page(s):249 - 251
Cited by:  Papers (10)
| | PDF (448 KB)

Transistors with current gains of 2000 to 10000 at collector currents less than 1 μA can now be made in monolithic circuits. This is more than ten times the gain of present-day discrete transistors. The significance of this breakthrough is greatest for IC operational amplifiers as lower input bias currents are constantly being sought. Circuit techniques are available, namely bootstrapping and c... View full abstract»

• ### Frequency-selective integrated circuits using phase-lock techniques

Publication Year: 1969, Page(s):216 - 225
Cited by:  Papers (12)  |  Patents (2)
| | PDF (1832 KB)

A system-oriented approach to the design of inductorless tuned integrated circuits is described. This design method uses the phase-locked loop (PLL) techniques to obtain the desired tuning and interference-rejection characteristics. The PLL approach does not require tight control of component tolerances, and offers a higher selectivity and frequency capability than the corresponding active-RC synt... View full abstract»

• ### Synthesis of operational amplifiers

Publication Year: 1969, Page(s):241 - 243
| | PDF (352 KB)

Operational amplifiers are specified from system considerations. A set of equations is evaluated giving the active part of the amplifier as a function of the specifications. The solution is claimed to be an optimal one with respect to circuit complexity. This statement is verified by an example. View full abstract»

• ### Experimental sync separator and associated circuitry in integrated form

Publication Year: 1969, Page(s):210 - 216
| | PDF (1304 KB)

An experimental integrated circuit that performs the functions of sync separation, noise inversion, and AGC amplification was designed and fabricated. The IC uses p-channel enhancement-type MOS units as active transistors, diodes, and resistors. The threshold voltages permit the design of voltage-regulator circuits for the reference levels in the various signal-processing stages. The results of a ... View full abstract»

• ### IC signal-processing circuit for TV receivers

Publication Year: 1969, Page(s):202 - 210
Cited by:  Patents (1)
| | PDF (1472 KB)

An IC signal-processing circuit that can be applied in both black-and-white and color receivers is described. The integrated circuit combines the following functions: video preamplifier; keyed AGC detector, operating on top sync level; AGC amplifier for IF and tuner control; noise canceling circuits for AGC and sync circuits; sync separator; automatic horizontal sync; and vertical sync pulse separ... View full abstract»

• ### Integrated MOS analog delay line

Publication Year: 1969, Page(s):196 - 201
Cited by:  Papers (4)
| | PDF (872 KB)

A 16-stage, fixed or variable analog delay line that makes use of integrated p-channel MOS field-effect transistors is described. The delay line relies on sample' and hold' techniques and makes use of the inherent characteristics of p-channel MOS transistors. The delay line provides unit gain with a dynamic range of 1 volt. The bandwidth of the delay line is 0.8 MHz under nonsampling conditions.... View full abstract»

• ### Design techniques for monolithic operational amplifiers

Publication Year: 1969, Page(s):184 - 191
Cited by:  Papers (51)  |  Patents (1)
| | PDF (776 KB)

The characteristics of recently developed integrated-circuit components are reviewed and some new devices are described. Their impact on the design of monolithic operational amplifiers is also discussed. Emphasis is placed on realizing particularly good dc characteristics-especially low input current. However, techniques for obtaining higher operating speeds are also covered. View full abstract»

• ### Periodic-switching filter networks-a means of amplifying and varying transfer functions

Publication Year: 1969, Page(s):225 - 230
Cited by:  Papers (28)  |  Patents (10)
| | PDF (944 KB)

A technique of periodically switching filter networks makes continuously variable filter parameters possible; at the same time capacitor or time-constant multiplication is obtained. With this method the time constants are multiplied by the switching period to switch aperture-time ration. Because the aperture time is usually small compared to the switching period, the active elements can be shared.... View full abstract»

## Aims & Scope

The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Jan Craninckx
Imec
Kapeldreef 75
B-3001 Leuven, Belgium
jssc.craninckx@gmail.com