Solid-State Circuits, IEEE Journal of
Issue 10 • Date Oct. 2002
Society Sponsor
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Displaying Results 1 - 21 of 21
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Patent abstracts
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PDF (478 KB)
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High-voltage transistor scaling circuit techniques for high-density negative-gate channel-erasing NOR flash memories
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PDF (316 KB)
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Switched-current circuits in digital CMOS technology with low charge-injection errors
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PDF (502 KB)
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A single-chip CMOS optical microspectrometer with light-to-frequency converter and bus interface
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PDF (221 KB)
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A 1-V 10.7-MHz switched-opamp bandpass ΣΔ modulator using double-sampling finite-gain-compensation technique
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PDF (456 KB)
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A 120-mW 3-D rendering engine with 6-Mb embedded DRAM and 3.2-GB/s runtime reconfigurable bus for PDA chip
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PDF (255 KB)
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Novel principle for vector modulator-based phase shifters operating with only one control voltage
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PDF (217 KB)
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Comprehensive study of multiband unconditional stabilization of common-source and common-gate MESFET transistors using feedback
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PDF (401 KB)
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A pixel-level automatic calibration circuit scheme for capacitive fingerprint sensor LSIs
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PDF (301 KB)
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A 48-16-MHz CMOS SC decimation filter
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PDF (326 KB)
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A 0.8-V 128-kb four-way set-associative two-level CMOS cache memory using two-stage wordline/bitline-oriented tag-compare (WLOTC/BLOTC) scheme
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PDF (406 KB)
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Fast frequency acquisition phase-frequency detectors for Gsamples/s phase-locked loops
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PDF (236 KB)
Aims & Scope
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.
Meet Our Editors
Editor-in-Chief
Un-Ku Moon
Oregon State University, EECS
