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Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Issue 7 • Date Jul 2002

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Displaying Results 1 - 18 of 18
  • Existence and characterization of limit cycles in nearly symmetric neural networks

    Page(s): 979 - 992
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (517 KB) |  | HTML iconHTML  

    It is known that additive neural networks with a symmetric interconnection matrix are completely stable, i.e., each trajectory converges toward some equilibrium point. This paper addresses the fundamental question of robustness of complete stability of additive neural networks with respect to small perturbations of the nominal symmetric interconnections. It is shown that in the general case, complete stability is not robust. More precisely, the paper considers a class of neural networks, and gives a necessary and sufficient condition for the existence of Hopf bifurcations (HBs) at the equilibrium point at the origin, arbitrarily close to symmetry. Such HBs originate stable limit cycles and hence cause the loss of complete stability. Furthermore, the paper highlights situations where the HBs are particularly critical, in the sense that the amplitude of the limit cycles is very sensitive to errors due to tolerances in the electronic implementation of the neuron interconnections. It is shown that sensitivity is crucially dependent on the neuron nonlinearity, and it is also significantly influenced by the features of the interconnection matrix and the network dimension. Finally, limitations of the obtained results are discussed and hints for future work are given View full abstract»

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  • An algebraic observability approach to chaos synchronization by sliding differentiators

    Page(s): 1000 - 1006
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (304 KB) |  | HTML iconHTML  

    In this paper, an observability approach to the synchronization of chaotic and hyperchaotic systems is presented. The proposed method allows the reconstruction of a chaotic attractor from a scalar observable and its derivatives. The method is based on the concept of algebraic observability; hence, it is directly applicable to all chaotic algebraic systems. Moreover, it is shown that a sliding differentiator, derived by a second-order suboptimal control algorithm, can be used to reconstruct the time derivatives of the observable. This makes it possible to estimate the system state, i.e., chaos synchronization, in a finite time View full abstract»

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  • Steady-state analysis of soft-switching converters

    Page(s): 939 - 954
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (454 KB)  

    Steady-state analysis of soft-switching converters is discussed in this paper. Finding the steady-state solution of soft-switching converters by means of start-up transient simulation may involve onerous computations and convergence failure, because of the mix of fast and slow natural frequencies determined respectively by the presence of soft-switching Lr-Cr cells elements and bulky L-C filter elements. The numerical method proposed in this paper shows high reliability and fast convergence, thanks to the adoption of an interval analysis based technique for the detection of commutations and of a compensation theorem based technique for the analysis of commutations. Some examples of steady-state analysis of two dc-dc converters, an inverter and a power factor corrector are presented to highlight the good performances of the simulation algorithm View full abstract»

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  • Computation of design values for Class E amplifiers without using waveform equations

    Page(s): 966 - 978
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (545 KB) |  | HTML iconHTML  

    This paper presents a novel design procedure for Class E amplifiers without using waveform equations. By the proposed design procedure, Class E amplifiers can be designed regardless of the Q factor of resonant circuit, existence of the switch on resistor, and so on. The proposed design procedure requires only circuit equations and design specifications. All design procedures reported until now require deriving waveform equations which requires a lot of work. The benefits of the proposed design procedure is that it is to deriving waveform equations is no longer necessary. When the circuit equations are obtained, the other procedures for computation of design values are carried out with aid of computer. Therefore, we can design Class E amplifier more easily than the conventional design procedure. The authors design Class E amplifiers by using the proposed design procedures and carry out the circuit experiments, and find that the experimental results agree with calculation results, and show the validity of the proposed design procedure View full abstract»

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  • Design methodology and advances in nested-Miller compensation

    Page(s): 893 - 903
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (328 KB) |  | HTML iconHTML  

    The nested Miller compensation of three-stage amplifiers is reviewed by using a simple design-oriented approach. The method provides stable amplifiers by accurately controlling the overall phase margin as well as that of the internal loop. Furthermore, the use of nulling resistors to remove the RHP zeros is discussed and optimization criteria are described. A novel technique is presented which allows an amplifier's frequency and settling performance to be greatly improved without increasing power consumption. Thanks to the small compensation capacitors employed, the approach is amenable for integration and in particular where large load capacitors have to be driven. SPICE simulations based on a 0.8-μm CMOS design are given and found in remarkable agreement with the theoretical analysis View full abstract»

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  • LMI-based approach for asymptotically stability analysis of delayed neural networks

    Page(s): 1033 - 1039
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (349 KB) |  | HTML iconHTML  

    This paper derives some sufficient conditions for asymptotic stability of neural networks with constant or time-varying delays. The Lyapunov-Krasovskii stability theory for functional differential equations and the linear matrix inequality (LMI) approach are employed to investigate the problem. It shows how some well-known results can be refined and generalized in a straightforward manner. For the case of constant time delays, the stability criteria are delay-independent; for the case of time-varying delays, the stability criteria are delay-dependent. The results obtained in this paper are less conservative than the ones reported so far in the literature and provides one more set of criteria for determining the stability of delayed neural networks View full abstract»

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  • A piecewise-linear simplicial coupling cell for CNN gray-level image processing

    Page(s): 904 - 913
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (803 KB) |  | HTML iconHTML  

    In this paper, we propose a universal piecewise-linear (PWL) CNN coupling cell, the simplicial cell, which is intended to work with binary as well as gray-level inputs. The construction of the cell is based on the theory of canonical simplicial PWL representations. As a consequence, the coupling function is endowed with important numerical features, namely: the representation of the characteristic cell function is sparse; the family of coupling functions constitutes a Hilbert space; powerful solution algorithms have been developed for the approximation of nonlinear functions, which is particularly useful when the CNN parameters need to be tuned from examples; the parameters can be extracted from a truth table when the CNN is specified analytically View full abstract»

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  • Low complexity parallel multiplier in F(qn) over Fq

    Page(s): 1009 - 1013
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (321 KB) |  | HTML iconHTML  

    In this brief, parallel multiplication in F(qn) over Fq, where q can be a prime power, is considered. A closed form proof has been given for the size complexity bound of the parallel multiplier. Implementation with reduced propagation delay has been shown with an example. Basis conversion between the weakly dual basis and the polynomial basis has also been discussed View full abstract»

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  • Schur stability of polytopes of bivariate polynomials

    Page(s): 1020 - 1023
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (243 KB) |  | HTML iconHTML  

    Necessary and sufficient conditions for Schur stability of polytopes of bivariate polynomials have been established. Based on a simplification, the two-dimensional (2-D) analysis for stability of polytopes of 2-D polynomials is turned into that of polytopes of one-dimensional (1-D) polynomials with complex variable coefficients. We reveal that the uncertain coefficients of the 2-D polytopes possess a linear affine property, and then show that the stability of a polytope of bivariate polynomials can be guaranteed by that of finite edge polynomials of the polytope. An algorithm for the stability test of edge polynomials is provided View full abstract»

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  • A low-cost Gray prediction search chip for motion estimation

    Page(s): 928 - 938
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (467 KB)  

    Taking advantage of the prediction ability provided by Gray system theory, the Gray prediction search (GrPS) algorithm can determine the motion vectors of image blocks correctly and quickly. A dedicated GrPS chip, which is with low cost and has the properties of regular-data-flow computations, is proposed in this paper to support the MPEG video resolution in real time. With 0.6-μm CMOS technology, the proposed chip needs a die size of 2.8×2.9 mm2 with about 54-K transistors, and can work with a clock rate of 66 MHz. Since GrPS performs better than other fast search algorithms, such as TSS, CS, PHODS, FSS, and SES, this low-cost GrPS chip is a good candidate for real-time motion estimation View full abstract»

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  • An estimation of upperbound of delays for global asymptotic stability of delayed Hopfield neural networks

    Page(s): 1028 - 1032
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (320 KB) |  | HTML iconHTML  

    This paper provides an upperbound of delays for the global asymptotic stability of the equilibrium of Hopfield neural networks with transmission delays. Such a bound has important significance in both theory and application for the design of the globally stable networks. An example is also given to illustrate that the conditions of our result are feasible View full abstract»

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  • Bandpass chaotic dynamics of electronic oscillator operating with delayed nonlinear feedback

    Page(s): 1006 - 1009
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (261 KB) |  | HTML iconHTML  

    An electronic noise-generator producing high-dimensional narrowband chaotic signals is reported. The generator has the form of a delayed nonlinear feedback circuit. It has potential applications in secure communications View full abstract»

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  • M-channel linear phase perfect reconstruction filter bank with rational coefficients

    Page(s): 914 - 927
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (587 KB) |  | HTML iconHTML  

    This paper introduces a general class of M-channel linear phase perfect reconstruction filter banks (FBs) with rational coefficients. A subset of the presented solutions has dyadic coefficients, leading to multiplierless implementations suitable for low-power mobile computing. All of these FBs are constructed from a lattice structure that is VLSI-friendly, employs the minimum number of delay elements, and robustly enforces both linear phase and perfect reconstruction property. The lattice coefficients are parameterized as a series of zero-order lifting steps, providing fast, efficient, in-place computation of the subband coefficients. Despite the tight rational or integer constraint, image coding experiments show that these novel FBs are very competitive with current popular transforms such as the 8×8 discrete cosine transform and the wavelet transform with 9/7-tap biorthogonal irrational-coefficient filters View full abstract»

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  • A novel low-harmonic three-phase rectifier

    Page(s): 955 - 965
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (372 KB) |  | HTML iconHTML  

    A novel three-phase low-harmonic rectifier is proposed. The rectifier consists of a diode bridge, three bi-directional switches that are switched at the double of the line frequency, and a current shaping network. Two current shaping networks are proposed, the first one consisting of two capacitors and three resistors or switching resistance emulators, and the second one consisting of two capacitors, two resistors and a transformer. The power processed by the resistors or resistance emulators is shown to be equal 8.81% of the input power. The rectifier is suitable for application at medium and high power levels, since only the small amount of the input power is processed by high-frequency switching converters, and as a retrofit upgrade of existing rectifiers, requiring connection at only five points. Design guidelines are presented. Switching resistance emulation is discussed, and its feasibility is demonstrated. Analytical results are experimentally verified on a 2 kW rectifier View full abstract»

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  • A MOS approach to CMOS DET flip-flop design

    Page(s): 1013 - 1016
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (230 KB) |  | HTML iconHTML  

    A novel approach to double-edge-triggered (DET) flip-flop design is presented along with a new static flip-flop and a new dynamic flipflop. The approach builds CMOS circuits using pass transistors and MOS-style clocked inverters and addresses issues of threshold voltage drop (VT drop) and circuit complexity. Among DET designs, the number of switched and total transistors used by our flip-flops is less than or equal to any in related work. Our circuits beat all others in speed (maximum frequency response) by significant margins at medium to high supply voltages. The speed outperformance range for our static flip-flop is 1.5 to 5 V and for our dynamic flip-flop is <2.5 to 5 V View full abstract»

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  • Linear matrix inequalities for robust strictly positive real design

    Page(s): 1017 - 1020
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (249 KB) |  | HTML iconHTML  

    A necessary and sufficient condition is proposed for the existence of a polynomial p(s) such that the rational function p(s)/q(s) is robustly strictly positive real when q(s) is a given Hurwitz polynomial with polytopic uncertainty. It turns out that the whole set of candidates p(s) is a convex subset of the cone of positive semidefinite matrices, resulting in a straightforward strictly positive real design algorithm based on linear matrix inequalities View full abstract»

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  • Application-level robustness and redundancy in linear systems

    Page(s): 1024 - 1027
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (266 KB) |  | HTML iconHTML  

    The paper quantifies the degradation in performance of a linear model induced by perturbations affecting its identified parameters. We extend sensitivity analyses available in the literature, by considering a generalization-based figure of merit instead of the inaccurate training one. Effective off-line techniques reducing the impact of perturbations on generalization performance are introduced to improve the robustness of the model. It is shown that further robustness can be achieved by optimally redistributing the information content of the given model over topologically more complex linear models of neural network type. Despite the additional robustness achievable, it is shown that the price we have to pay might be too high and the additional resources would be better used to implement a n-ary modular redundancy scheme View full abstract»

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  • A fully integrated chaotic system for the generation of truly random numbers

    Page(s): 993 - 1000
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (373 KB) |  | HTML iconHTML  

    This work proposes a random numbers generator for application in the field of secure communications. In order to get truly unpredictable sequences a chaotic system is used. Indeed, due to their extreme sensitivity to initial conditions, chaotic systems lend themselves to be exploited for generation of random numbers. This work explores this possibility: particularly an efficient architecture, based on a pipeline analog-to-digital converter, has been singled out, in order to realize a simple circuit arrangement of the number generator. According to simulation results, the circuit provides sequences of 8-b numbers that are uniformly distributed and statistically independent, at a rate of 20 Ms/s. The circuit is realized in 0.8-μm CMOS technology, and dissipates 50 mW View full abstract»

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