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Components, Hybrids, and Manufacturing Technology, IEEE Transactions on

Issue 3 • Date Sep 1990

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Displaying Results 1 - 20 of 20
  • Knowledge-based control of adhesive dispensing for surface mount device assembly

    Page(s): 516 - 520
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (440 KB)  

    Results of a major project using knowledge-based control techniques to resolve the problems encountered in the dispensing of the very viscous adhesives used to secure surface mounted components to mixed technology circuit boards before wave soldering are reported. The study has two major thrusts: the accommodation of process variability with a rule-based system that controls a manufacturing cell, and the accommodation of material variability with a real-time rule-based process control system. Dispensing problems are caused by variations in the material and system properties with, for example, batch, temperature, and time. A dispensing cell that is able to use a rule-based object-oriented control system to resolve these problems has been integrated View full abstract»

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  • LED array modules by new technology microbump bonding method

    Page(s): 521 - 527
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    An LED array module was developed by using the microbump bonding method by which the electrodes of LSI chips and circuit substrate are press-bonded by utilizing the shrinkage stress produced in a light setting insulating resin. The LED array module has a resolution of 400 DPI, and is constructed by face-down mounting of 54 each of the LED chips and driver LSIs on a glass substrate. These LED chips, having an electrode pitch of 63.5 μm, are disposed on the glass substrate at a pitch of 10 μm. A dedicated bonder was developed for this assembling work. A report on the LED array module assembling process and the construction of a bonder is presented View full abstract»

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  • Laser trimming of thick film resistors on aluminum nitride substrates

    Page(s): 596 - 602
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    Problems, and their countermeasures encountered in laser trimming of thick film resistors on aluminum nitride (AlN) substrates were studied. Trimming was done in air by the selection of a suitable laser power (up to 1 W of YAG laser at the interface between the resistor and AlN). Under these conditions, resistance values could be controlled to within ±1% of their target values. Resistance changes of trimmed resistors were less than ±0.4% after a thermal cycle test (-55 to 150°C, 1000 cycles) and a high temperature storage test (150°C, 1000 h). Under the conditions generally used for trimming of alumina hybrid integrated circuits (YAG, 2 W, in air), resistance control was possible, but the insulation characteristics at the irradiated regions were degraded. When AlN substrates were directly irradiated under these conditions, the surfaces were also damaged. Damaged regions were fully covered with a fluid substance consisting mainly of Al2O3. Insulation degradation was attributed to formation of free Al, along with the Al2O3. However, under irradiation at low power, no insulation degradation was found, because the formation of free Al and Al2O3 was suppressed View full abstract»

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  • A CAD coupled laser beam test system for digital circuit failure analysis

    Page(s): 490 - 493
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    An automated contactless testing system that consists of a laser scanning microscope (LSM) coupled with a CAD layout database is described. Logic state detection and automated failure analysis in CMOS circuits can be done without the need of vacuum, and with a minimum of circuit environment preparation. The coupling of the LSM and the CAD layout database leads to automated node location, and minimizes the failure search because it enables the user to backtrace signal interconnections inside the circuit during the local test session View full abstract»

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  • Effect of heat treatment on the shear strength and fracture modes of copper wire thermosonic ball bonds to Al-1% Si device metallization

    Page(s): 587 - 591
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    The effect of bonding machine parameters and subsequent heat treatment in air or nitrogen atmospheres at 125°C, 200°C, and 300°C, for times up to 1000 h, on the shear strength of thermosonically ball-bonded copper wires to an Al-1% Si metallization on a silicon substrate, is investigated. The shear strength of the bonds formed at high power was always substantially higher than that of those formed at low power. Heat treatment in air generally increased the strength of bonds at low power. The strength decreased substantially for bonds formed at low power and heat treated in nitrogen at 125°C and 200°C. The full effect of annealing at any temperature was established after about 200 h. Detailed statistics of the mode of failure showed that fracture tended to occur at the copper/metallization interface, but this was influenced by the bonding power and heat treatment. Negligible interdiffusion occurred, and no intermetallic compounds were observed View full abstract»

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  • Is design realization a process? A case study

    Page(s): 509 - 515
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    It is established that design realization is a process in a design organization. Process quality management and improvement techniques are applied to the analysis, and an action plan to improve the process is developed. The analysis of the process indicates that a substantial fraction of the design cycle time is for noncreative activities, such as waiting for models, duplication of effort, unanticipated delays in the delivery of custom piece parts, and redesigns to unstable design requirements. The impact of these delays is to increase the time from product conception to the time the product is available to the customers. Corrective actions, including improvements in schedule tracking by management, developing and meeting milestones, planning the front-end analysis of the design project for marketing and technical feasibility, the formation of an interdisciplinary team to carry the design from conception through manufacturing, and an education program are proposed View full abstract»

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  • Correlation between electrical resistance and microstructure in gold wirebonds on aluminum films

    Page(s): 592 - 595
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    Gold ball bonds attached to either pure Al films or Al films with Cu and Si additions were annealed at temperatures in the range 77-277°C for periods of up to 3000 h. Electrical resistance of the bonds was measured to within ±1 mΩ using a manual four-probe arrangement with an applied current of up to 100 mA. Nonlinear multiple regression analysis of the data produced an empirical model for the resistance increase up to 8 mΩ. The resistance increases are related to the intermetallic phases and void configurations observed View full abstract»

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  • In-line statistical process control and feedback for VLSI integrated circuit manufacturing

    Page(s): 484 - 489
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    Four quality-control and yield-improvement techniques used in an IC wafer fabrication line are described, with examples of how each has improved quality and yield. (1) Silicon wafer measurements obtained from the supplier or made at incoming inspection are correlated with device parameters and chip yield. (2) Control charts in manufacturing are generated online from monitor wafer data entered by operators, giving immediate feedback. In addition, a daily summary report lists any chart out of control. In certain instances it is necessary to improve the process capability of an operation. A feedback technique is used to do this for operations which have a predictable systematic drift. (3) Individual wafer positions in critical operations are automatically recorded through the fabrication line. This greatly facilitates correlation of input to output parameters and pinpoints the root cause of physical, device parameter, or chip yield fluctuations. (4) Rapid correlation of the myriad of data obtained throughout the fabrication and wafer test areas is done with a common database and tools which transform the raw data into an optimum form for analysis View full abstract»

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  • A new aramid/epoxy laminate for advanced SMT

    Page(s): 570 - 575
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    A new aramid/epoxy laminate for use in advanced surface mount technology has been developed. The laminate consists of paper from PPODTA (co-poly-paraphenylene 3,4'-oxydiphenylene terephthalamide) and epoxy resin with high purity and high temperature resistance. Because the laminate is designed and processed to have minimum impurities, high glass transition temperature, and high dimensional stability, the laminate can be used as a substrate for LCCC, COB, flip chip, PGA, TAB, and other advanced surface mount technologies. The laminate is among the most reliable for electromigration between surface conductors, between plated-through barrels, and between opposed conductors. These properties are related to the purity and high temperature resistance of both the reinforcement material and the resin. Drilling, chemical treatment, and plating technologies lengthen the life of plated-through holes to thermal shocks. Applications to multilayer boards were also investigated by putting a stress on registration behaviors of the boards. The better registration of the new laminate was attributed to lower thermal expansion and higher temperature resistance than those of conventional FR-4 laminates View full abstract»

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  • Low stress silver-glass die attach materials

    Page(s): 478 - 483
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    The influence of sintering and rheological properties on the performance of silver-glass die attach materials is described. Improved silver-glass material has been developed. Stress relief for large-area dice gives void- and crack-free die bonding. This is achieved by controlling the sintering rate via additive technology. Precise rheology for high-speed dispensing in a tight cavity is possible by implementing the Y, E, and n rheological criteria in the manufacturing control. Single-pass firing with no predrying for large area dice (500 mils or larger) is possible View full abstract»

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  • Electroless Ni-P resistors for fusing roll

    Page(s): 576 - 578
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    A direct heating fusing roll with heating elements on the outer circumference of a pipe has been developed as a new fusing method for electrophotography. Compared with the conventional lamp-type fusing unit, the new fusing unit significantly reduces the warm-up time and power consumption. Using electroless Ni-P resistors provides uniform distribution of roll surface temperature and high reliability. The structure and performance of the new fusing roll and the adaptability of electroless Ni-P resistors are described View full abstract»

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  • Effect of fretting in aluminum-to-tin connections

    Page(s): 579 - 586
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    The degradation of aluminium-to-tin plated electrical connections under fretting conditions is studied. In addition to contact resistance measurements, scanning electron microscopy (SEM) and X-ray fluorescence (EDX) analyses were used to study the processes involved. The results showed that fretting adversely affects the contact resistance of aluminum-to-tin plated connections, which show a rapid increase and substantial fluctuations after prolonged exposure to fretting. Two sustained plateaus in the contact resistance characteristics were observed: one coinciding with the melting voltage of tin and aluminum, and the other in the range corresponding to the voltage range of the melting, sublimation, and decomposition of the oxides, and vaporization of contact materials. The effects of fretting were reduced significantly by applying higher contact loads. SEM and EDX analysis revealed that considerable damage of the contact zones resulted from the fretting action and substantial exchange of material occurred View full abstract»

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  • Fabrication of high density multichip modules

    Page(s): 565 - 569
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    The fabrication steps necessary to build high-density multichip module substrates are reviewed, and some of the complex process decisions needed to obtain a system which will eventually be produced in high volumes are discussed. Thin-film-based high-density multichip modules are necessary to achieve satisfactory performance in new electronic designs. Substrates built with vacuum-deposited metal and polymeric insulators have evolved in much more complex structures than traditional thin film hybrid View full abstract»

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  • Mass production back-grinding/wafer-thinning technology for GaAs devices

    Page(s): 528 - 533
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    The first mass-production back-grinding technology applicable to a fully-automatic wafer-thinning process in GaAs device manufacturing is described. Excellent productivity has been realized because the brittleness of GaAs has been overcome. A mirror-like stress-free surface was obtained by utilizing the wafer-rotating downfeed grinding method with slight chemical etching. The thickness of the deformed layer due to back-grinding was evaluated at 0.6 μm. The wafer bow and the changes in electrical characteristics of GaAs devices caused by this layer were eliminated by chemical etching. The threshold voltages of GaAs MESFETs were confirmed to shift negatively by no more than 5 mV. This technology has been successfully demonstrated in several kinds of GaAs device fabrication processes View full abstract»

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  • Placing surface mount components using coarse/fine positioning and vision

    Page(s): 559 - 564
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    An experimental system that can accurately align and place SMDs (surface mount devices) on a PCB (printed circuit board) using a coarse/fine positioning component placement strategy and end-point sensing to measure the alignment error is described. Coarse positioning is done with an IBM 7576 robot, and fine positioning is done using a custom-designed precision micropositioning device attached to the end of the IBM 7576 robot. The end-point sensor is a single-camera vision system that by image analysis determines the alignment error of the SMD to the board. System performance was evaluated by placing SMDs of 100 leads with 0.63-mm (25 mil) lead spacing on a board. An alignment error of less than 12 μm (0.5 mil) and 0.015° was obtained independent of feeder and board position error or robot repeatability. The average cycle time was less than 10 seconds View full abstract»

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  • Electronic system packaging: the search for manufacturing the optimum in a sea of constraints

    Page(s): 494 - 508
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    Manufacturing electronic systems is a multicomponent, multichip, hybrid design process which spans the life of the product. The design constraint list is not limitless, but if incomplete, can lead to economic loss for the product. Details of some of the constraints that affect system performance, reliability, materials selection, and the assembly of the product are presented. The electronic constraints include chip crossing delay, fan out (number of receivers on a driven net), crosstalk (unwanted electromagnetic coupling between independent signal lines and power supplies), DC voltage drop, the number of simultaneously switched line drives and reflections of signal waves from discontinuities in transmission line networks. The power dissipation constraints include maximum junction temperature, ambient temperature and pressure drop conditions, and component-to-component temperature variation. The cost constraints include materials, fabrication, and assembly. Some of the mathematical constraints are defined, along with the coupling between them and optimum solutions are shown graphically. The ability to resolve the system manufacturing constraints through optimization will determine the final success of a product View full abstract»

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  • Analyzing the mechanical strengths of SMT attached solder joints

    Page(s): 553 - 558
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    Analytic approaches to the pull strength and the shear strength of SMT (surface mount technology) attached solder joints are studied by mathematical models. The predicted pull/shear strength of leaded ceramic quad packages was correlated with the experimentally measured data. The predictive models have been used for defining the design guidelines for selecting the optimum lead/pad configurations, the minimum solder volume, and the maximum component misalignment for fine-pitch SMT assemblies View full abstract»

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  • Vacuum mechatronics and self-contained manufacturing for microelectronics processing

    Page(s): 473 - 477
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    A self-contained automated robotic factory (SCARF) is described. This includes a central chamber with various transfer and monitoring ports, a vacuum-compatible robot for wafer transfer, and a particle monitoring system, all under automation. The cylindrical coordinate SCARF vacuum-compatible robot is unique, due to its fully vacuum-compatible motors, closed-loop control and configuration which makes it an ideal central component for a self-contained manufacturing system. Color vision system for in-vacuum inspection and measurement which will be an integral part of SCARF is being developed. Details of the SCARF system and robot are discussed, as well as the key technical issues facing the development of self-contained manufacturing systems View full abstract»

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  • Dynamic behavior of SMT chip capacitors during solder reflow

    Page(s): 545 - 552
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    A dynamic model of a surface mount packaging technology (SMT) type 1206 chip capacitor is developed. The model is used to determine the effects of pad geometry, chip metallization and dimensions, solder volume, and chip displacement on the ability of the chip to lift (tombstone) and to self-align during solder reflow. Both static and dynamic characterizations are shown. The model simulations show that the chip capacitor will begin to lift initially for some geometries, but tombstoning does not appear to be a problem. Thus to help the self-alignment capabilities, the simulations show that system configurations with smaller pad lengths, smaller pad gaps, larger solder volume, and smaller metallization are best. These conclusions are supported by existing recommendations based on experimental tests. The model is a powerful tool that can be used to optimize these system parameters View full abstract»

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  • Solder joint reliability of fine pitch surface mount technology assemblies

    Page(s): 534 - 544
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    The reliability of fine-pitch solder joint interconnection is studied. It consists of two different fine-pitch surface mount components (SMC), namely, the Electronic Industry Associates of Japan (EIAJ) 160-Pin Quad Flat Pack (QFP), and the Joint Electronic Device Engineering Council (JEDEC) 132-Pin Plastic Quad Flat Pack (PQFP). They each have a lead-spacing (from lead-center to lead-center) of approximately 0.025 in. For comparison purposes the conventional JEDEC 68-Pin Plastic Leaded Chip Carrier (PLCC) and the 84-Pin PLCC have also been used in the same manufacturing process. Solder joint reliability of these four SMCs has been quantified for the mechanical shock, mechanical vibration, and thermal environmental stress factors View full abstract»

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Aims & Scope

This Transaction ceased production in 1993. The current publication is titled IEEE Transactions on Components, Packaging, and Manufacturing Technology.

Full Aims & Scope