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IEE Proceedings - Computers and Digital Techniques

Issue 6 • Date Nov 2001

 This issue contains several parts.Go to:  Part Supplement 

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Displaying Results 1 - 8 of 8
  • Proof regarding the NP-completeness of the unweighted complex-triangle elimination (CTE) problem for general adjacency graphs

    Publication Year: 2001, Page(s):238 - 244
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (735 KB)

    The elimination of all complex triangles (CT) is an essential step in the rectangular dualisation approach of floor-planning. It is known that the weighted complex triangle elimination problem, i.e. the version of the problem where the input to the problem is a weighted adjacency graph, is NP-complete. Also, for adjacency graphs with 0-level containment the unweighted problem is optimally solvable... View full abstract»

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  • Pragmatic method for the design of fast constant coefficient combinational multipliers

    Publication Year: 2001, Page(s):196 - 206
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (811 KB)

    To characterise and analyse the performance of evolutionary graph generation (EGG) on a cluster of PCs, a parallel version of the EGG system, called the distributed EGG (DEGG) system, has been developed using a message-passing interface (MPI). To demonstrate the capability of DEGG, it is applied to find the optimal design of various multipliers. Experimental results substantially clarify that the ... View full abstract»

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  • Cryptographic systems using a self-certified public key based on discrete logarithms

    Publication Year: 2001, Page(s):233 - 237
    Cited by:  Papers (3)  |  Patents (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (525 KB)

    The paper proposes new cryptographic systems using a self-certified public key, including a signature scheme, key distribution system and public key cryptosystem, the security of which is based on discrete logarithms. The public key and the identity of users can be verified implicitly at the same time as the cryptographic systems work. The proposed schemes require reduced computing time and increa... View full abstract»

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  • Formulation for the computation of Boolean operations

    Publication Year: 2001, Page(s):189 - 195
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (748 KB)

    Boolean or switching equations are powerful mathematical tools for digital logic. Several problems in digital circuit design, such as automatic test pattern generation, could be efficiently solved if fast procedures for solving Boolean equations were available. Several methods for solving this class of equations have been developed, but their efficiency is a problem. A new formulation for the comp... View full abstract»

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  • PayFair: a prepaid internet ensuring customer fairness micropayment scheme

    Publication Year: 2001, Page(s):207 - 213
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (865 KB)

    A software-based prepaid micropayment scheme is developed. As with existing prepaid micropayment schemes, the profits of the merchants are protected. Furthermore, in this proposed scheme, fairness for the customers is also assured. More precisely, in this new scheme, the merchant, after receiving prepaid money, can only claim that a customer has already spent a specific amount of money by showing ... View full abstract»

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  • Circuit switching: an analysis for k-ary n-cubes with virtual channels

    Publication Year: 2001, Page(s):215 - 219
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (548 KB)

    Adding virtual channels to k-ary n-cubes can greatly improve network performance because they act as 'bypass' lanes to reduce message blocking in the network. Although several analytical models have been proposed for circuit switching, most of these have not included the effects of virtual channel multiplexing on network performance. This paper presents a new performance model of circuit switching... View full abstract»

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  • Probabilistic carry state estimate for improved asynchronous adder performance

    Publication Year: 2001, Page(s):221 - 226
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (545 KB)

    The paper presents a new type of simple adder, suitable for asynchronous digital circuits and implementation in VLSI technology, which has either speed and/or area advantages over existing designs. It is based on the concept of predicting the carry from least to most significant halves of a 32 or 64 bit adder in such a way that it has a high probability of being correct, while introducing only a l... View full abstract»

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  • Hardware-efficient pipelined programmable FIR filter design

    Publication Year: 2001, Page(s):227 - 232
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (582 KB)

    With the increasing demand for video-signal processing and transmission, high-speed programmable FIR filters are required for real-time processing. This paper presents a hardware-efficient pipelined FIR architecture with programmable coefficients. FIR operations are first reformulated into multi-bit DA form at an algorithm level. Then, at the architecture level, the (p, q) compressor, instead of B... View full abstract»

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