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Solid-State Circuits, IEEE Journal of

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Solid-State Circuits, IEEE Journal of

Issue 2 • Date Feb. 2002

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Editorial

New associate editor

Correction to "exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design"

Patent abstracts

A class-D vertical booster for CRT

Highly sensitive Hall magnetic sensor microsystem in CMOS technology

Race logic architecture (RALA): a novel logic concept using the race scheme of input variables

Synchronization circuit performance

A field programmable analog array for CMOS continuous-time OTA-C filter applications

A 700-MHz 1-W fully differential CMOS class-E power amplifier

Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration

On the use of Nauta's transconductor in low-frequency CMOS g_m-C bandpass filters

A post-package bit-repair scheme using static latches with bipolar-voltage programmable antifuse circuit for high-density DRAMs

A 100×100 pixel silicon retina for gradient extraction with steering filter capabilities and temporal output coding

An ASIC for Hartmann-Shack wavefront detection

A CMOS transceiver for DRAM bus system with a demultiplexed equalization scheme

The effects of a ground shield on the characteristics and performance of spiral inductors

An adaptive analog noise-predictive decision-feedback equalizer

A 32-word by 32-bit three-port bipolar register file implemented using a SiGe HBT BiCMOS technology

Compact associative-memory architecture with fully parallel search capability for the minimum Hamming distance

A 1.2-GIPS/W microprocessor using speed-adaptive threshold-voltage CMOS with forward bias

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