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IEEE Micro

Issue 4 • Date Aug. 1990

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Displaying Results 1 - 6 of 6
  • Hierarchical discrete-event simulation on hypercube architectures

    Publication Year: 1990, Page(s):10 - 20
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (987 KB)

    The simulation of systems that include components at varying levels of abstraction is addressed. A performance model of a hierarchical discrete-event simulation algorithm running on a hypercube architecture is presented. The model allows the performance impact of decisions made in the design of the parallel processor as well as in the design of the simulation algorithm to be examined. Three static... View full abstract»

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  • A parallel unification machine

    Publication Year: 1990, Page(s):21 - 33
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1119 KB)

    A parallel unification machine (PUM) that speeds up the unification algorithm is proposed. The PUM partitions unification into a match step and a consistency-check step, conducts these two steps concurrently, and takes advantage of the match parallelism. The machine architecture, algorithms, data formats, and processor organization are described. The machine has been simulated at the register-tran... View full abstract»

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  • An ASIC methodology for mixed analog-digital simulation

    Publication Year: 1990, Page(s):34 - 40
    Cited by:  Papers (1)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (548 KB)

    A practical approach to high-speed, mixed, analog-digital simulation is described. The system, known as the Analog Modeling Package (AMP), comprises a range of models, Laplace transform algorithms, and supporting programs. AMP not only supports the analog modeling process, but also enables analog models to be simulated on any digital simulator that supports a C or Pascal model interface. Each of t... View full abstract»

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  • A model for the high-level description and simulation of VLSI networks

    Publication Year: 1990, Page(s):41 - 48
    Cited by:  Papers (1)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (595 KB)

    An applicative state transition (AST) model for the description and analysis of synchronous and asynchronous VLSI networks at the top levels of abstraction is presented. The model, which uses two powerful paradigms that provide an elegant, fast method for the high-level description and simulation of VLSI networks, explicitly represents the flow of information through a network. This is done by emb... View full abstract»

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  • A microprogrammable list processor for personal computers

    Publication Year: 1990, Page(s):50 - 61
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (796 KB)

    A low-cost alternative to using a full-scale Lisp machine for list processing is proposed. The ASLP, a PC-based, highly pipelined list processor with two memory modules, supplements a procedural programming language to solve the list-manipulation problems in AI programs. This hardware-assisted processor was designed for use on an IBM PC AT to support list-manipulation functions. A discussion of Li... View full abstract»

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  • Text-to-speech conversion on a personal computer

    Publication Year: 1990, Page(s):62 - 74
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (924 KB)

    A system that uses a set of units derived from Arabic syllables to synthesize unlimited-vocabulary speech on PCs is presented. Text-transcription rules operate on input orthography to generate an abstract representation of phonemes and syllables that form synthesis units and speech. General aspects of the problem, such as the synthesis method and the generation of synthesis units, are discussed. T... View full abstract»

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Erik R. Altman
School of Electrical and Computer Engineering
IBM T.J. Watson Research Center