Issue 8 • Date Aug 2001
Filter Results
-
Functional vector generation for HDL models using linear programming and Boolean satisfiability
|
PDF (152 KB)
-
RAGS-real-analysis ALAP-guided synthesis
|
PDF (212 KB)
-
Graph-theory-based simplex algorithm for VLSI layout spacing problems with multiple variable constraints
|
PDF (296 KB)
-
-
OCCOM-efficient computation of observability-based code coverage metrics for functional verification
|
PDF (204 KB)
-
Combined word-length optimization and high-level synthesis of digital signal processing systems
|
PDF (200 KB)
-
-
Synchronous approach to the functional equivalence of embedded system implementations
|
PDF (316 KB)
-
Estimation of peak power dissipation in VLSI circuits using the limiting distributions of extreme order statistics
|
PDF (316 KB)
Aims & Scope
Contains articles on methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities.
Meet Our Editors
Editor-in-Chief
Sachin Sapatnekar
University of Minnesota
Dept. of Electrical and Computer Engineering
4-174 Keller Hall, 200 Union Street SE
Minneapolis, MN 55455 55455 USA
sachin@umn.edu


