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Circuits and Systems, IEEE Transactions on

Issue 8 • Date Aug 1990

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Displaying Results 1 - 17 of 17
  • General results concerning the BIBO stability of inverse 2-D digital filters

    Page(s): 1036 - 1040
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (316 KB)  

    Consideration is given to the open problem concerning the BIBO (bounded-input, bonded-output) stability of inverse 2-D digital filters in the presence of nonessential singularities of the second kind on T2, the distinguished boundary of the unit bidisk. Necessary and sufficient conditions are obtained for the BIBO stability as well as the boundedness of a large class of mutually inverse 2-D digital filters having such singularities on T2. Some illustrative examples are included View full abstract»

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  • A new constrained least mean square time-delay estimation system

    Page(s): 1060 - 1064
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    An adaptive filter for determining the time difference in a signal between two split-array outputs is described. A least-mean-square (LMS) algorithm is used to adapt the constrained filter coefficients to samples of a sinc function. The newly configured LMS time-delay estimation model has a faster convergence speed and a superior ability to track time-varying delays. In addition, the same filter length can be used to measure a longer delay without resulting in a larger truncation error View full abstract»

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  • CNN cloning template: shadow detector

    Page(s): 1070 - 1073
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (296 KB)  

    A report on an extremely simple cloning template for cellular neural network (CNN) is presented. The template is capable of detecting the shadow cast by a two-dimensional image. The operation of the template is illustrated by an example. It is shown that when the shadow detector is used in addition to the connected-component detector (CCD), the recognition rate of handwritten characters (numerals, alphabets, symbols Japanese characters) increases significantly. This means that the output of the shadow detector contains a valuable feature, not revealed by the output from the CCD alone View full abstract»

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  • Genericness of solution to N-dimensional polynomial matrix equation XA=I

    Page(s): 1041 - 1043
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    It is shown that the solution to N-dimensional polynomial matrix equation XA=I, dim A=n*m is generic if nm+N, and nongeneric in other cases. The author shows how to apply this result to equations with structured matrices A. An example of application is given: c-observability and c-reconstructability of a 2-D general state-space model are generic if a system has more than one output View full abstract»

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  • A discrete/continuous time-domain analysis of a generalized class E amplifier

    Page(s): 1057 - 1060
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    A simple and efficient procedure relying on a state-space description of the circuit to evaluate boundary conditions in a class-E, switching-mode, RF amplifier is described. The amplifier model used includes the on and off resistances of the active device switch. The state-space description is converted to a discrete-time representation which allows incorporating the problem into the framework of linear algebraic equations. Details on determining boundary conditions and a simple but efficient program to calculate them are provided View full abstract»

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  • Analysis and design of class E zero-current-switching rectifier

    Page(s): 1000 - 1009
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    The analysis, design equations, and experimental results are presented for a class-E zero-current switching (low di/dt ) rectifier. Equations governing circuit operation are derived, assuming an ideal sinusoidal input current source. The diode turns on at zero di/dt and low absolute value of dv/dt, and turns off at low absolute value of di /dt, reducing switching losses, switching noise, and reverse recovery effect. The diode junction capacitance is not included in the rectifier topology and causes ringing after turn-off. The experimental results of 0.5 MHz agreed with the design calculations. The rectifier can be used in high-frequency, high-power-density switching power supplies View full abstract»

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  • A simple introduction to the transmission-line modeling

    Page(s): 991 - 999
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    Transmission-line modeling, a numerical method for field problems, is presented in simple terms that undergraduate students and nonexperts can understand. The method is shown to be applicable in solving various problems involving the diffusion equation, Poisson's equation, or the wave equation. A special application of the method is made to wave propagation problems. Numerical examples are provided for waveguide problems in one and two dimensions View full abstract»

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  • Crosstalk analysis of interconnection lines and packages in high-speed integrated circuits

    Page(s): 1019 - 1026
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (588 KB)  

    A novel approach for the analysis of crosstalk, propagation delay, and pulse distortion of interconnects in high-speed integrated circuits, packages, and circuit boards is presented. Based on frequency-domain modal analysis, a set of formulas is derived to describe the voltage and current transfer functions of coupled interconnects with arbitrary linear termination impedances and used to obtain analytical expressions for the time-domain waveforms for lossless multiconductors interconnection lines. The weak-coupling assumption is found to be only marginally valid. In a typical interconnection configuration, the secondary coupling of the disturbed line on the original signal line substantial and must be taken into account for accurate prediction of the waveforms. Simulation results are given to illustrate the influence of the layout parameters of the interconnects and the rise or fall times of the source signal. It is shown that ground conductors need to be placed on both sides of each of the signal lines to reduce crosstalk effectively. However, the presence of the ground conductors increases the layout complexity and results in more severe waveform distortion for the signal on the active line View full abstract»

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  • On the placement of critical devices in analog integrated circuits

    Page(s): 1052 - 1057
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    The question of how to arrange devices (e.g. MOS transistors) in analog integrated circuits so that process variations on the chip affect the circuit's performance as little as possible is addressed. The answer to this question-a generalization of the common centroid technique-is outlined, and the solution for the specific input-transistor layout of a differential difference amplifier is presented. The method can be applied to other precision analog circuits, like multipliers. Placement of components like capacitors in switched-capacitor circuits can be treated analogously View full abstract»

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  • Bifurcation phenomena in second-order digital filter with saturation-type adder overflow characteristic

    Page(s): 1068 - 1070
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    An analysis of the dynamic behavior of a second-order digital filter operating outside the region of absolute stability in the case of saturation nonlinearity of the accumulator is presented. Bifurcation phenomena associated with changes of one of the parameters of the filter's linear part are investigated. On the basis of a numerical study, it is conjectured that systems trajectories become chaotic for some parameter ranges. Several interesting bifurcation patterns have been revealed-including devil's staircase and self-similar, fan-type structures View full abstract»

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  • Design of multidimensional spherically symmetric and constant group delay recursive digital filters with sum of powers-of-two coefficients

    Page(s): 1027 - 1035
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (624 KB)  

    A method is presented for the design of multidimensional, spherically symmetric, separable-denominator recursive digital filters with sum-of-powers-of-two coefficients satisfying both predetermined magnitude and constant group delay specifications. This method has two stages. In the first stage the denominator of the specific transfer function is designed to satisfy the constant group delay specification. In the second stage the corresponding constant group delay numerator is designed along with the designed denominator in order to meet the magnitude specification. Both stages are carried out by successive quantizations and reoptimizations of precomputed continuous coefficients. The optimization algorithm used is continuous, unconstrained, and nonlinear. Since such an M-dimensional recursive transfer function possesses symmetry, the number of unknown coefficients and the number of frequency samples for optimization can be greatly reduced; this method is computationally efficient. The results of three design examples are given for illustration View full abstract»

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  • Design of orthogonal biquad digital filters

    Page(s): 1043 - 1048
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    Complex digital filter techniques are briefly discussed. Three designs of a special class of complex filters called orthogonal filters are presented: the orthogonal direct form, minimum norm, and optimal state-space filters. The direct-form structure has previously been used in the design of transmultiplexers, whereas the minimum-norm and optimal state-space structures are new. The noise and stability performance of each structure are discussed and compared View full abstract»

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  • Explicit realization of a new class of lossless symmetrical lumped-element 4-port couplers with maximally flat coupling

    Page(s): 1064 - 1067
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    A class of lossless symmetrical lumped-element four 1-1 port couplers with maximally flat coupling is presented. The four-port circuits can be realized using a new synthesis procedure for symmetrical four 1-1 port networks. The even- and odd-mode circuits are symmetrical lumped-element lattice networks View full abstract»

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  • Synthesis of discrete time-varying null filters for frequency-varying signals using the time-warping technique

    Page(s): 977 - 990
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    A synthesis of two second-order discrete time-varying filters (DTVF), capable of suppressing a sine signal with arbitrary frequency variation, is presented. These structures are obtained by using the time-warping concept. A noise analysis is carried out for these two DTVFs and their performance is compared. It is shown that for the particular application considered, the rule of time-dependence of the DTVF (the synchronization) may be effectively obtained by using a phase-locked loop (PLL) system. As an example, the DTVF-PLL system is used for synchronous phase estimation of a sine wave corrupted by closely spaced FM interference. Simulation results are provided to substantiate the analysis and demonstrate the efficiency of the proposed time-varying system. The main feature of the TLM method is its formulation and programming simplicity. The method also generates a large amount of information; not only is the impulse response of a structure obtained, yielding in turn its response to any excitation, but the characteristics of the dominant and higher order modes are also accessible in the frequency domain through the Fourier transform View full abstract»

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  • A neural-like network approach to finite ring computations

    Page(s): 1048 - 1052
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    Computation over finite rings using networks modeled after the general neural network approach is discussed. In this case, the neurons are arithmetic elements that have modulo operator characteristics, rather than the usual nonlinear, saturating characteristics of learning and associative memory neural network applications. Following an analysis of finite-ring arithmetic, a computing model based on an iterative, bit-level modulo reduction scheme is built, from which a basic operator is extracted. A corresponding subnet is designed to implement this operator, and its effectiveness is illustrated in two examples of computing finite-ring operations for residual number system computations View full abstract»

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  • The CCD neural processor: a neural network integrated circuit with 65536 programmable analog synapses

    Page(s): 1073 - 1075
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (200 KB)  

    The design, fabrication, and preliminary testing of an integrated circuit implementing neural network (NN) models with 256 on-chip, fully interconnected neurons and programmable analog synapses are reported. The integrated circuit was built using a charge-coupled-device-(CCD)-based architecture. A study of the current efforts to develop NN hardware reveals that the conventional electronic approach suffers from two major problems: (1) a tradeoff between the complexity of the synapse and the number of synapses per chip; and (b) the I/O (input/output) problem, namely, the slow communication between the chip and the surrounding environment. This approach circumvents the problems by using CCD arrays and/or a spatial light modulator as a short-term memory for the device. The preliminary results presented serve to validate the assumptions on which the CCD approach is based and to reassess the potential of this approach. The CCD architecture is based on two main assumptions: (a) the revolving charge packets in the CCD rings can complete several full cycles without substantial decay, (thus the required refresh of the matrix from an external memory will not significantly degrade the overall operation speed) and (b) the multiplication process, namely, the nondestructive sensing of the Wij packets revolving in the CCD rings and their accumulation (provided the respective Vj is on) can be accomplished accurately and quickly. It is now clear that both these assumptions are valid View full abstract»

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  • Load-independent class E power inverters. I. Theoretical development

    Page(s): 1010 - 1018
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    An analysis is presented for a class-E power inverter that exhibits any of the following characteristics: (1) load-independent, nonzero output voltage, but not load-independent efficiency; (2) load-independent nonzero efficiency, but not load output voltage; (3) simultaneous load-independent, nonzero output voltage and load-independent nonzero efficiency. Solutions for a class-E inverter with load-independent, nonzero output voltage and 100% efficiency are given. The infinite set of solutions is reduced by practical considerations. Circuit parameters for practical load-independent class-E inverters are provided View full abstract»

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