IEEE Transactions on Computers

Issue 3 • Mar 2001

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Displaying Results 1 - 6 of 6
  • Inherently lower-power high-performance superscalar architectures

    Publication Year: 2001, Page(s):268 - 285
    Cited by:  Papers (51)  |  Patents (20)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1616 KB) | HTML iconHTML

    In recent years, reducing power has become an important design goal for high-performance microprocessors. This work attempts to bring the power issue to the earliest phases of microprocessor development, in particular, the stage of defining a chip microarchitecture. We investigate power-optimization techniques of superscalar microprocessors at the microarchitecture level that do not compromise per... View full abstract»

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  • Lifetime-sensitive modulo scheduling in a production environment

    Publication Year: 2001, Page(s):234 - 249
    Cited by:  Papers (20)  |  Patents (53)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1276 KB) | HTML iconHTML

    This paper presents a novel software pipelining approach, which is called Swing Modulo Scheduling (SMS). It generates schedules that are near optimal in terms of initiation interval, register requirements, and stage count. Swing Modulo Scheduling is a heuristic approach that has a low computational cost. This paper first describes the technique and evaluates it for the Perfect Club benchmark suite... View full abstract»

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  • On estimating the large entries of a convolution

    Publication Year: 2001, Page(s):193 - 196
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (260 KB) | HTML iconHTML

    We give a Monte Carlo algorithm that computes an unbiased estimate of the convolution of two vectors. The variance of our estimate is small for entries of the convolution that are large; this corresponds to the situation in which convolution is used in pattern matching or template matching, where one is only interested in the largest entries of the resulting convolution vector. Experiments perform... View full abstract»

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  • Automata-based symbolic scheduling for looping DFGs

    Publication Year: 2001, Page(s):250 - 267
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (752 KB) | HTML iconHTML

    This paper presents an exact technique for scheduling looping data-flow graphs that implicitly supports functional pipelining and loop winding. Automata-based symbolic modeling provides efficient representation of all causal executions of a given behavioral description subject to finite state bounds. Since a complete set of scheduling solutions is found, further incremental refinements, such as se... View full abstract»

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  • On supporting temporal quality of service in WDMA-based star-coupled optical networks

    Publication Year: 2001, Page(s):197 - 214
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1892 KB) | HTML iconHTML

    In this paper, we devise a preallocation-based single-hop wavelength division multiple access (WDMA) scheme to support temporal quality of service (QoS) in star-coupled optical networks, We consider a star-coupled broadcast-and-select network architecture in which N stations are connected to a star coupler with W different wavelength channels. Each of the W wavelength channels is slotted and share... View full abstract»

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  • An optimal allocation of carry-save-adders in arithmetic circuits

    Publication Year: 2001, Page(s):215 - 233
    Cited by:  Papers (19)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (680 KB) | HTML iconHTML

    Carry-save-adder (CSA) is one of the most widely used components for fast arithmetic in industry. This paper provides a solution to the problem of finding an optimal-timing allocation of CSAs in arithmetic circuits. Namely, we present a polynomial time algorithm which finds an optimal-timing CSA allocation for a given arithmetic expression. We then extend our result for CSA allocation to the probl... View full abstract»

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The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org