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IEE Proceedings - Circuits, Devices and Systems

Issue 6 • Date Dec 2000

 This issue contains several parts.Go to:  Part Supplememt 

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Displaying Results 1 - 10 of 10
  • Quantitative method for evaluating quality of analogue VLSI layout

    Publication Year: 2000, Page(s):313 - 318
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (484 KB)

    A quantitative benchmarking metric is presented for the evaluation of the quality of analogue layout. It facilitates comparisons between alternative design automation tools and, for a given tool, provides assessment of each layout instance. The quality metric reflects two principal concerns in layout design: area efficiency and net routing optimality. The algorithm has been developed to accommodat... View full abstract»

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  • Spice model for AM-PM conversion introduced by weakly nonlinear circuits

    Publication Year: 2000, Page(s):325 - 330
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (368 KB)

    An algorithm is installed into the Spice code for simulating AM-PM conversion as a phase statement of compression and desensitisation phenomena. The algorithm is based on a novel model suitable for analysis of the AM-PM conversion introduced by weakly nonlinear circuits. The Berkeley Spice version 3F5 source code was modified to obtain the compression and desensitisation coefficients and the AM-PM... View full abstract»

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  • Comparison of charge pump circuits for half-bridge inverters

    Publication Year: 2000, Page(s):356 - 362
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (336 KB)

    Charge pumps can be used to generate floating voltage supplies owing to their low input to output voltage drop and circuit simplicity. When used to power the high-side circuitry of half-bridges, the charge pump circuit can be simplified significantly by replacing the function of the dedicated pump oscillator with the switching action of the half-bridge output voltage. Three classes of the auto cha... View full abstract»

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  • Performance comparison between static and dynamic CMOS logic implementations of a pipelined square-rooting circuit

    Publication Year: 2000, Page(s):347 - 355
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (432 KB)

    Pipelined cellular array implementations of arithmetic circuits are usually adopted to obtain high throughput at reasonable cost. The circuit design style used to implement the array greatly influences both performance and cost. The designer has to move in a varied and complex scenario, since nowadays scores of logic styles are known among CMOS families. Static logic styles are easy to use and the... View full abstract»

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  • 1.5 V 1.8 GHz bandpass amplifier

    Publication Year: 2000, Page(s):331 - 333
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (172 KB)

    To have a fully integrated communication system in CMOS, a CMOS bandpass amplifier which combines the functions of low noise amplifier (LNA) and bandpass filter (BPF) is necessary. In a conventional bandpass amplifier, a Q-enhancement circuit is required to compensate for the resistive loss in the integrated inductor. The Q-enhancement circuit, however, being active, increases the power consumptio... View full abstract»

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  • Author Index

    Publication Year: 2000, Page(s): 369
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (36 KB)

    First Page of the Article
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  • Automatic analogue circuit synthesis using genetic algorithms

    Publication Year: 2000, Page(s):319 - 323
    Cited by:  Papers (22)  |  Patents (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (316 KB)

    Most analogue systems are designed manually because automatic circuit synthesis tools are available for only a limited range of design problems. A new approach to circuit synthesis based on genetic algorithms is presented. Using this method it is possible in principle to synthesise circuits to meet any linear or nonlinear, frequency-domain or time-domain, specification. When applied to existing fi... View full abstract»

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  • Feedback amplifier configurations

    Publication Year: 2000, Page(s):334 - 346
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (732 KB)

    Systematic relations exist between the four basic single-loop feedback amplifier configurations (voltage-gain, current-gain, transfer-admittance and transfer-impedance) and certain newer configurations for which bandwidth is independent of gain. Loop gain provides the link. For a given amplifier without feedback and specified demanded gain, loop gain and hence bandwidth can be maximised by optimum... View full abstract»

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  • High performance double edge-triggered flip-flop using a merged feedback technique

    Publication Year: 2000, Page(s):363 - 368
    Cited by:  Patents (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (336 KB)

    Double edge-triggered flip-flops (DETFFs) use both edges of the clock to latch data and hence can lead to significant power saving over single edge-triggered flip-flops for a fixed data rate. However, existing DETFF implementations suffer from the problems of charge sharing, charge coupling, incomplete voltage swing, poor voltage scaling properties and excessive power dissipation. A new DETFF is p... View full abstract»

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  • Subject Index

    Publication Year: 2000, Page(s):370 - 372
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (228 KB)

    First Page of the Article
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